1Spring 2002 EECS150 - Lec7-Bool2 Page 1EECS150 - Digital DesignLecture 7 - Boolean Algebra IIFebruary 12, 2002John WawrzynekSpring 2002 EECS150 - Lec7-Bool2 Page 2Outline• Canonical Forms– They give us a method to go from TT to Boolean Equations• Two-level Logic Simplification– K-map method• Multi-level Logic• NAND/NOR networks• EXOR revisitedSpring 2002 EECS150 - Lec7-Bool2 Page 3Canonical Forms• Standard form for a Boolean expression - unique algebraicexpression from a TT.• Two Types:* Sum of Products (SOP)* Product of Sums (POS)• Sum of Products (disjunctive normal form, minterm expansion).Example:minterms a b c f f’a’b’c’ 0 0 0 0 1a’b’c 0 0 1 0 1a’bc’ 0 1 0 0 1a’bc 0 1 1 1 0ab’c’ 1 0 0 1 0ab’c 1 0 1 1 0abc’ 1 1 0 1 0abc 1 1 1 1 0One product (and) term for each 1 in f:f = a’bc + ab’c’ + ab’c +abc’ +abcf’ = a’b’c’ + a’b’c + a’bc’Spring 2002 EECS150 - Lec7-Bool2 Page 4Sum of Products (cont.)Canonical Forms are usually not minimal:Our Example:f = a’bc + ab’c’ + ab’c + abc’ +abc = a’bc + ab’ + ab = a’bc + a (x’y + x = y + x) = a + bcf’ = a’b’c’ + a’b’c + a’bc’ = a’b’ + a’bc’ = a’ ( b’ + bc’ ) = a’ ( b’ + c’ ) = a’b’ + a’c’Spring 2002 EECS150 - Lec7-Bool2 Page 5Canonical Forms• Product of Sums (conjunctive normal form, maxterm expansion).Example:maxterms a b c f f’a+b+c 0 0 0 0 1a+b+c’ 0 0 1 0 1a+b’+c 0 1 0 0 1a+b’+c’ 0 1 1 1 0a’+b+c 1 0 0 1 0a’+b+c’ 1 0 1 1 0a’+b’+c 1 1 0 1 0a’+b’+c’ 1 1 1 1 0One sum (or) term for each 0 in f:f = (a+b+c)(a+b+c’)(a+b’+c)f’ = (a+b’+c’)(a’+b+c)(a’+b+c’)(a’+b’+c)(a+b+c’)Mapping from SOP to POS (or POS to SOP): Derive TT then proceed.Spring 2002 EECS150 - Lec7-Bool2 Page 6Two-level Logic SimplicationKey tool: The Uniting Theorem x (y’ + y) = x (1) = xa b f f = ab’ + ab = a(b’+b) = a0 0 0 b values change within0 1 0 the on-set rows1 0 1 a values don’t change1 1 1 b is eliminated, a remainsa b g g = a’b’+ab’ = (a’+a)b’ =b’0 0 1 b values stay the same0 1 0 a values changes1 0 11 1 0 b’ remains, a eliminated2Spring 2002 EECS150 - Lec7-Bool2 Page 7Boolean CubesVisual technique for identifying when the Uniting Theoremcan be applied1-cube0 1x2-cube01 1100 10xy011 111110001000 100010101yxz3-cube• Sub-cubes of on nodes can be used for simplification.– On-set - filled in nodes, off-set - empty nodesa b f g0 0 0 10 1 0 01 0 1 11 1 1 001 1100 10fbaa asserted & unchangedb varies ab + ab' = aSpring 2002 EECS150 - Lec7-Bool2 Page 83-variable cube exampleFA carry out:a b c cout0 0 0 00 0 1 00 1 0 00 1 1 11 0 0 01 0 1 11 1 0 11 1 1 1011 111110001000 100010101bac(a' + a)bcab(c'+c)a(b+b')ccout = bc + ab + ac011 111110001000 100010101bacab’c’ + ab’c + abc’ + abc ac’ + ac + ab = a + ab = a• Both b & c change, a isasserted & remains constant.What about larger sub-cubes?Spring 2002 EECS150 - Lec7-Bool2 Page 9Karnaugh Map Method• K-map is an alternative method of representing the TT andto help visual the adjacencies.0 101abcab00 01 11 1001abcd 00 01 11 10000111105 & 6 variable k-maps possibleSpring 2002 EECS150 - Lec7-Bool2 Page 10Karnaugh Map Method• Examplesg = b'0 101abcab00 01 11 10010 101abcab00 01 11 10010 10 1f = a0 0 1 00 1 1 1cout = ab + bc + ac1 10 00 0 1 10 0 1 1f = a1. Circle the largest groups possible.2. Group dimensions must be a power of 2. Spring 2002 EECS150 - Lec7-Bool2 Page 11K-maps (cont.)cab00 01 11 10011 0 0 10 0 1 1f = b'c' + acabcd 00 01 11 10000111101 0 0 10 1 0 01 1 1 11111f = c + a'bd + b'd'(bigger groups are better)Circling Zeros abcd 00 01 11 10000111101 0 000 0111 1 1 11111f = (b' + c + d)(a' + c + d')(b + c + d')Spring 2002 EECS150 - Lec7-Bool2 Page 12BCD incrementer examplea b c d w x y z0 0 0 0 0 0 0 10 0 0 1 0 0 1 00 0 1 0 0 0 1 10 0 1 1 0 1 0 00 1 0 0 0 1 0 10 1 0 1 0 1 1 00 1 1 0 0 1 1 10 1 1 1 1 0 0 01 0 0 0 1 0 0 11 0 0 1 0 0 0 01 0 1 0 - - - -1 0 1 1 - - - -1 1 0 0 - - - -1 1 0 1 - - - -1 1 1 0 - - - -1 1 1 1 - - - -00 01 110001111011abcd00 01 110001111011abcd00 01 110001111011abcd00 01 110001111011abcdw xy z0000 00000000000 00 000 0 0 00 011 11111 11 11 1 11 1--- ------ ---------------w = x =y = z =3Spring 2002 EECS150 - Lec7-Bool2 Page 13Higher Dimensional K-maps00 01 11 1000101110bcdea = 100 01 11 1000101110a = 000 01 11 1000101110cdefab = 1000 01 11 1000101110ab = 1100 01 11 1000101110ab = 0100 01 11 1000101110ab = 00Spring 2002 EECS150 - Lec7-Bool2 Page 14Multi-level Combinational LogicŸ Example: reduced sum-of-products formx = adf + aef + bdf + bef + cdf + cef + gŸ implementation in 2-levels with gates:cost: 7-input OR, 6 3-input AND 50 transistors + 25 wires(19 literal plus 6 internal)delay: 3-input AND gate delay + 7-input OR gate delayŸ Factored form:x = (a + b +c)(d + e)f + gcost: 1 3-input OR, 2 2-input OR, 1 3-input AND 20 transistorsdelay: 3-input OR + 3-input AND + 2-input ORWhich is faster?In general: Using multiple levels (more than 2) will reduce the cost. Sometimes alsodelay. Sometime a tradeoff between cost and delay.adfabcdefgxSpring 2002 EECS150 - Lec7-Bool2 Page 15Multi-level Combinational LogicExample: F = abc + abd +a’c’d’ + b’c’d’let x = ab y = c+df = xy + x’y’No convenient hand methods for multi-level logic simplification:1 CAD Tools, example misII (UCB)2 exploit some special structure, example adderAre these optimizations still relevant for LUT implementations?abcabdacdbcdabcdfxySpring 2002 EECS150 - Lec7-Bool2 Page 16NAND-NAND & NOR-NOR NetworksDeMorgan’s Law:(a + b)’ = a’ b’ (a b)’ = a’ + b’ b + b = (a’ b’)’ (a b) = (a’ + b’)’push bubbles or introduce in pairs or remove pairs.= ===Spring 2002 EECS150 - Lec7-Bool2 Page 17NAND-NAND & NOR-NOR Networks• Mapping from AND/OR to NAND/NANDabcda)b)c) d)Spring 2002 EECS150 - Lec7-Bool2 Page 18NAND-NAND & NOR-NOR Networks• Mapping AND/OR to NOR/NOR• OR/AND to NAND/NAND• Mapping OR/AND to NOR/NORa) b)c)abcdabcdabcda) b)c)paira'b'c'd'4Spring 2002 EECS150 - Lec7-Bool2 Page 19Multi-level NetworksF = a(b + cd) + bc’Convert to NANDs (note fanout)cdbabc'fabcdSpring 2002 EECS150 - Lec7-Bool2 Page 20EXOR FunctionParity, addition mod 2x xor y = x’y + xy’x y xor xnor0 0 0 1 0 1 1 01
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