1.0 Motivation2.0 Introduction to TTL3.0 Prelab4.0 Lab Procedure5.0 HP54645D Mixed Signal Oscilloscope (Logic Analyzer)5.1 Front Panel Controls5.1.1 Display & Brightness Control5.1.2 Softkeys5.1.3 Calibration Output5.1.4 Autoscale5.1.5 Measurement Controls5.1.6 Analog Controls5.1.7 Horizontal5.1.8 Digital5.1.9 Trigger5.1.10 Storage5.2 Triggering6.0 Lab 0 CheckoffEECS 150 Fall 2007 Lab 0UNIVERSITY OF CALIFORNIA AT BERKELEYCOLLEGE OF ENGINEERINGDEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCELab 0Chips, Scopes, and AnalyzersASSIGNED: Week of 8/27DUE: Week of 9/2, 10 minutes after start of your assigned lab section.1.0 MotivationIn this lab you will gain hands-on experience with simple combinational gates(the real version of what you met in simulation on 61C) breadboarding simple circuitsand using the basic tools of hardware design – signal generators and oscilloscopes.In future labs, you will be “wiring up” circuits by programming your FPGA. Thislab will give you a little bit of experience with traditional gates and insight toward what isgoing on inside the FPGA. Also, in debugging hardware you will often resort of using(or building) tools that generate certain patterns and observing how your hardwarebehaves when presented with those patterns.2.0 Introduction to TTLIn this lab you will use a single 74C00 quad NAND gate in a Dual Inline Package(DIP). You will gain some experience using the tools on your lab bench. First, we willuse the power supply and multimeter to observe the combinational behavior of a simplechip. Using the four gates that come in a 7400 package, you’ll build and verify a simplecombinational circuit. Second, we will utilize the function generator and oscilloscope toobserve its timing behavior. Third, we will “break the rules” for combination logic andbuild a simple sequential circuit – a ring oscillator – by creating a cycle of combinationallogic. Finally, we’ll build a sequential circuit that is useful for synchronous digital logicdesign – a latch.3.0 PrelabThere is no prelab preparation for this lab. Your TA will explain the operation of thematerials described below. You will consult the associated documentation as youwork through the lab.Materials1. Breadboard2. HP 8116A Pulse/Function Generator3. HP 54645D Mixed Signal Oscilloscope4. HP E3630A DC Power Supply5. 74C00 quad NAND chip6. ProbesUCB 1 2007EECS 150 Fall 2007 Lab 04.0 Lab ProcedureReceive you CS150 account from your lab TA. Log in and verify that your accountworks. (A) Logical Behavior1. Go on the web and find the datasheet for the chip that you are using. Identifythe pins used for power and ground, as well as the inputs and outputs of thegates. 2. Configure your power supply to provide 5V DC. Use the red COM terminalfor ground. Note that this connection may not be present on some powersupplies in which case the ground should be connected to the correspondingnegative terminal. Verify with your multimeter that you have a 5V supply towork with before you wire it to your chip. Wire these to Vdd and GND railsof your breadboard. Wire the rails to the corresponding Vdd and Gnd pins ofyour 74C00.3. Pick a NAND gate in your 74C00, identify its input pins and its output.Connect GND to the inputs of the NAND gate and capture the output usingthe multimeter. Repeat for the other 3 combinations of high and low inputs forthe NAND gate and draw the truth table. Verify that it is the NAND function.(You can also use your oscilloscope to observe the signals.)4. Using multiple NAND gates, configure them to implement a 2-input XORfunction. Draw the circuit. Draw the truth table. Wire it up and verify that itworks. Have your TA initial your checkoff.(B) Timing behavior1. Use the pulse/function generator to create a square wave as input to the seriesof NAND gates. You may need to play around a little with the amplitude andoffset for some of the function generators to get a proper square waveoscillating from 0V to 5V. If you are not familiar with the operation of theoscilloscope, read the summary below. Adjust the triggering and timescale sothat you can see a complete cycle. Adjust the cursors so that you can read theperiod on the screen (press the cursors button, and then select thetime/measurement cursors before using the entry knob to move them to theirproper location).2. Wire your NAND gates to form a sequence of inverters.3. Capture the input, the output of the first gate and the output of the last gateusing the oscilloscope. 4. Use the oscilloscope to measure the rise and fall times and the propagationdelays in your circuit. Use the time and voltage cursors to get these measuredtimes. 5. Find the rise and fall times and the propagation delays described in yourdatasheet? How do these compare to your measurements? 6. Reconfigure your circuit to have a single NAND gate driving three gates.How do the propagation times change?UCB 2 2007EECS 150 Fall 2007 Lab 0(C) Simple Sequential Circuit with Feedback1. Configure your circuit to form a ring containing three NAND gates.2. Explain the expected behavior of this circuit.3. Estimate the period and frequency of the output4. Capture the waveform and compare with your estimate. Have you TA initialyour checkoff.(D) Simple Latch 1. Configure your circuit to form a gated SR latch with cross-coupled NANDgates. hint: http://en.wikipedia.org/wiki/Latch_(electronic)2. What should be the behavior when the “Clock” input is high?3. What should be the behavior when the “Clock” input is low?4. Capture the waveform showing that it works as a latch. (You will need tothink a little bit about what you are going to provide as inputs to demonstrateit behavior to your TA.) UCB 3 2007CEECS 150 Fall 2007 Lab 05.0 HP54645D Mixed Signal Oscilloscope (Logic Analyzer)Figure 1: HP54645D Mixed Signal OscilloscopeShown in Figure 1 above, is the HP54645D Mixed Signal Oscilloscope, which wewill generally refer to as simply “the oscilloscope” or “the logic analyzer.” It is in fact acombination of these instruments, both of which are design to graph waveforms (analogand digital respectively) over time. Using the logic analyzer is significantly less complicated than it appears and it isan invaluable debugging tool. The logic analyzer allows us to examine signals over timeat various scales, you can zoom in to see events on different clock
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