CS150 Week 5, lecture 2 Covers:1) Glitches2) Solutions to glitch problems3) Converting to NAND4) Counters1) GlitchesGlitch: uninvited pulse at output.Hazard – circuit with potential for glitchesSimple examples: A Should always be 1, but could glitch to 0: Static 1 hazard. F A __ A F Glitch!!! A Should always be 0, but could glitch to 1: Static 0 hazardFHow does a hazard look on a K-map? _F = AB + ACIn SOP form: 1-1 correspondence between implicant (circled groups on K-map) and AND gates. The “job” of each AND gate is to represent a piece of the ON set. “Most” implicants/AND gates output 0 Moving inside the circle:i) No change on inputs to implicantii) No change on outputs In the ON set, worry about glitching to 0. In the OFF set, worry about glitching to 1.AF 00 01 11 10 0 1 ABC0 0 1 01 1 1 011AFBCAF2) Solutions to glitch problemsSOP: _F = AB + AC + BCPOS: _F = ( A + C )( A + B )( B + C )3) Converting to NAND Say you had a circuit like this: And someone told you to implement it with only NAND gates. What should you do? Answer:Replace with and bubble push…AF1BCAFBC 00 01 11 10 0 1 ABC0 0 1 01 1 1 0AF0CBAFBC 00 01 11 10 0 1 ABC0 0 1 01 1 1 0Now this circuit can be built with just inverters and NAND gates. (You can also build inverters from NAND gates and completely convert the circuit to a NAND circuit. NAND: )SOP AND/OR to NAND/NAND (as above) andPOS OR/AND to NOR/NOR:DON’T USE RULES. Understand bubble pushing.4) CountersOffset and limit counters covered in first lecture of week 5.The truth table for a binary counter: PS NS2 1 0 2 1 00 0 0 0 0 10 0 1 0 1 00 1 0 0 1 10 1 1 1 0 01 0 0 1 0 11 0 1 1 1 01 1 0 1 1 11 1 1 0 0 0 00 01 11 10 0 1 PS2PS1PS00 0 1 10 1 0 1NS2 00 01 11 10 0 1 PS2PS1PS00 1 1 01 0 0 1NS1 00 01 11 10 0 1 PS2PS1PS01 1 1 10 0 0 0NS0 ___NS0 = PS0 ___ ___NS1 = PS1 PS0 + PS1 PS0 = PS1 PS0 ___ ___ ___NS2 = PS2 PS0 + PS2 PS1 + PS2 PS1 PS0NSLogicD2 Q2D1 Q1D0 Q0PS2PS1PS0Do you need the midterm review
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