FeaturesGeneral Description1. Pin Descriptions1.1 Package Diagram1.2 Pin DescriptionTable 1. Pin Description2. Modes of Operation2.1 RGB Bypass2.2 DVI OutputTable 2. DVI Outputs3. Input Interface3.1 Interface Voltage Levels3.2 Input Clock and Data Timing DiagramTable 3. Interface Timing3.3 Input Clock and Data FormatsTable 4. Multiplexed Input Data Formats (IDF = 0, 1)Table 5. Multiplexed Input Data Formats (IDF = 2, 3)Table 6. Multiplexed Input Data Formats (IDF = 4)Table 7. Embedded Sync4. Register Control4.1 Control Registers Map4.2 Registers Read/WriteTable 8. Serial Port Register MapTable 9. Delay applied to XCLK before latching input data D[11:0]Table 10. The Registers Default Settings In Terms Of The Frequency RangesTable 11. Test Pattern ControlTable 12. Power Management5. Electrical SpecificationsTable 13: Absolute Maximum RatingsTable 14. Recommended Operating ConditionsTable 15. Electrical Characteristics (Operating Conditions: TA = 0oC - 70oC, VDD = 3.3V ± 5%)Table 16. DC SpecificationsTable 17. AC Specifications5.1 Timing InformationTable 18: Timing for Clock - Slave, Sync - Slave Mode6. Package Dimensions7. Revision HistoryCHRONTELCHRONTELCHRONTELCHRONTELCHRONTELChrontel201-0000-056 Rev. 1.32, 5/24/2005 1CH7301CCH7301C DVI Transmitter DeviceFeatures• DVI Transmitter up to 165M pixels/second• DVI low jitter PLL• DVI hot plug detection• Supporting graphics resolutions up to1600 x 1200 pixels• Providing RGB output• DAC connection detection• Programmable power management• Fully programmable through serial port• Complete Windows and DOS driver support• Low voltage interface support to graphics device• Three 10-bit video DAC outputs• Offered in a 64-pin LQFP packageGeneral DescriptionThe CH7301C is a display controller device which acceptsa digital graphics input signal, and encodes and transmitsdata through a DVI or DFP (Digital flat panel). The deviceaccepts data over one 12-bit wide variable voltage dataport which supports different data formats including RGBand YCrCb.The DVI processor includes a low jitter PLL for generationof the high frequency serialized clock, and all circuitryrequired to encode, serialize and transmit data. TheCH7301C comes in versions able to drive a DFP display ata pixel rate of up to 165MHz, supporting UXGAresolution displays. No scaling of input data is performedon the data output to the DVI device. See Figure 1 for thefunctional block diagram of the CH7301C.Color space conversion from YCrCb to RGB is supportedin both DVI and VGA bypass modes. Figure 1. Functional Block DiagramXCLK,XCLK*D[11:0]H,V,DE312TDC2,TDC2*TDC1,TDC1*TDC0,TDC0*TLC,TLC*DVIEncodeDVISerializeDVIDriverDVI PLLVREFDAC0DAC1Three10-bitDAC'sH SYNCISETDAC2VSWING224243242222HPDETAS SPC SPDGPIO[1:0] RESET*Serial Port ControlDataLatch,DemuxH,V,DELatchClockDriver2V SYNCSync DecodeColor spaceconversionCHRONTEL CH7301C 2 201-0000-056 Rev. 1.32, 5/24/20051. PIN DESCRIPTIONS1.1 Package DiagramFigure 2. 64-Pin LQFPDVDDVHSYNCGRTESTISETVDDGNDGNDNCNCNCNCGPIO[1] / HPINTGPIO[0]ASDGNDAGNDAVDDVSWINGTLCTLC*TDC0TDC0*TDC1TDC1*TDC2TDC2*TVDDTVDDTGNDTGNDTGNDDGNDSPDSPCRESET*HPDETDVDDVREFDVDDN/CBChrontelXCLKXCLK*D[11]D[10]D[9]D[8]D[7]D[6]D[5]D[4]D[3]D[2]D[1]D[0]DGNDDVDDHVDE VSYNCNCCH7301C12345678910111213141516646362616059585756555453525150493334353637383940414243444546474826272829303132171819202122232425201-0000-056 Rev. 1.32, 5/24/2005 3CHRONTEL CH7301C1.2 Pin Description Table 1. Pin Description64-Pin LQFP# Pins Type Symbol Description21In DEData EnableThis pin accepts a data enable signal which is high when active videodata is input to the device, and low all other times. The levels are 0 toDVDDV, and the VREF signal is used as the threshold level. Thisinput is used by the DVI.31In VREFReference Voltage InputThe VREF pin inputs a reference voltage of DVDDV / 2. The signalis derived externally through a resistor divider and decouplingcapacitor, and will be used as a reference level for data, sync, dataenable and clock inputs.41In/OutHHorizontal Sync Input / OutputThis pin receives / sends out horizontal sync input from / output to the graphics controller.51In/OutVVertical Sync Input / OutputThis pin receives / sends vertical sync input from / output to thegraphics controller.7 1 In/Out GPIO[1] /HPINTGeneral Purpose Input - Output[1] /DVI Detect Output (Open drain or internal weak pull-up)This pin provides a general purpose I/O controlled via the serial portbus. The internal pull-up will be to the DVDD supply.When the GPIO[1] pin is configured as an input, this pin can be usedto output the DVI detect signal (pulls low when a termination changehas been detected on the HPDET input). This is an open drain output.The output is released through serial port control.8 1 In/Out GPIO[0]General Purpose Input - Output[0](Open drain or internal weak pull-up)This pin provides a general purpose I/O controlled via the serial port. 91InHot Plug Detect (internal pull-down)This input pin determines whether the DVI is connected to a DVImonitor. When terminated, the monitor is required to apply a voltagegreater than 2.4 volts. Changes on the status of this pin will be relayedto the graphics controller via the HPINT or GPIO[1]/HPINT pinpulling low.When the HPDET is pulled low, the DVI output driver will be shutdown.10 1 In ASAddress Select (Internal pull-up)This pin determines the serial port address of the device(1,1,1,0,1,AS*,AS).13 1 In RESET*Reset * Input (Internal pull-up)When this pin is low, the device is held in the power-on resetcondition. When this pin is high, reset is controlled through the serialport register.14 1 In/Out SPDSerial Port Data Input / OutputThis pin functions as the serial data pin of the serial port interface, anduses the DVDDV supply.CHRONTEL CH7301C 4 201-0000-056 Rev. 1.32, 5/24/200564-Pin LQFP# Pins Type Symbol Description15 1 In SPCSerial Port Clock InputThis pin functions as the clock pin of the serial port interface, anduses the DVDDV supply.19 1 In VSWINGDVI Swing ControlThis pin sets the swing level of the DVI outputs. A 2.4K ohm resistorshould be connected between this pin and TGND using short and widetraces.22, 21 2 Out TDC0,TDC0*DVI Data Channel 0 OutputsThese pins provide the DVI differential outputs for data channel 0(blue).25, 24 2 Out TDC1,TDC1*DVI Data Channel 1 OutputsThese pins provide the DVI differential outputs for data channel 1(green).28, 27 2 Out TDC2,TDC2*DVI Data Channel 2 OutputsThese pins
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