DOC PREVIEW
Berkeley COMPSCI 150 - 1st Discussion Section Worksheet

This preview shows page 1 out of 2 pages.

Save
View full document
View full document
Premium Document
Do you want full access? Go Premium and unlock all 2 pages.
Access to all documents
Download any document
Ad free experience
Premium Document
Do you want full access? Go Premium and unlock all 2 pages.
Access to all documents
Download any document
Ad free experience

Unformatted text preview:

CS150, Spring 20101st Discussion Section WorksheetBrandon MyersJan 29, 11-12p1. The below plot is a DC Transfer Characteristic for a hypothetical inverter.a) Sketch the DC Transfer Characteristic for two inverters in series (on a separate set of axes).b) Draw the truth table for the new component.c) Draw a schematic for the new component. Give a name to the component.d) Are the two inverters in series a useful component? Why or why not?0 1 2 3 4 500.511.522.533.544.55DC Transfer CharacteristicVinVout2. How can you implement a 3-input Boolean function on an FPGA, if you only have 2-input LUTs? Explain why your solution works.3. What does the below circuit do?QQSETCLRDInClockOutReset4. Our toolbox contains an lots of AND, OR, and NOT gates, and basic D flip-flops. Sadly, our D flip-flops have only D and Clock inputs and of course a Q output.a) Basic gates are annoying to work with! Add a 2:1 Mux to our toolbox using what we have.b) It would be nice if our D flip-flop had an enable signal. Add this using what’s in our toolbox.c) Add a Reset signal to our D flip-flop. Does your design have asynchronous or synchronous reset?5. It turns out that you can build any Boolean function out of NOT and 2-input AND and OR gates.a) are there any 2-input gates (functions) that by themselves can build any Boolean function?b) prove your claim in (a).c) Build an XOR out of AND, OR, NOT gates. If your answer to (a) was yes, then build an XORalso out of just that special


View Full Document

Berkeley COMPSCI 150 - 1st Discussion Section Worksheet

Documents in this Course
Lab 2

Lab 2

9 pages

Debugging

Debugging

28 pages

Lab 1

Lab 1

15 pages

Memory

Memory

13 pages

Lecture 7

Lecture 7

11 pages

SPDIF

SPDIF

18 pages

Memory

Memory

27 pages

Exam III

Exam III

15 pages

Quiz

Quiz

6 pages

Problem

Problem

3 pages

Memory

Memory

26 pages

Lab 1

Lab 1

9 pages

Memory

Memory

5 pages

Load more
Download 1st Discussion Section Worksheet
Our administrator received your request to download this document. We will send you the file to your email shortly.
Loading Unlocking...
Login

Join to view 1st Discussion Section Worksheet and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view 1st Discussion Section Worksheet 2 2 and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?