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Berkeley COMPSCI 150 - CS 150 Checkpoint

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Checkpoint 3To Do: Before LabPowerPoint PresentationVideo SignalSlide 5From wvlibcs150check3.schTwo Cycle WriteOE, UART_OE, AD_OEOE, UART_OE, AD_OE, cont.Processing A/D dataTo Do: In LabTo Do: Check Your CircuitTo Do: CheckoffsHintsGeneral DebuggingSlide 16Slide 17Slide 18Slide 19Checkpoint 3•To Do•Hints•General DebuggingTo Do: Before Lab•Plan layout of chips•Wire sync separator, A/D, op amp and RC network•Enter and simulate FSM to store one video frame in SRAM (either 196x210 or 14x10)Video SignalVideo Signal•Begin frame: “Wait 17 horizontal periods after vertical sync. goes low.”–VBLANK.H = active high VERT_SYNC•Begin row: “Wait 9.5 usec after composite sync. goes low”–9.5 usec = 4.7 usec + 4.8 usec•Ex: 52.4 usec / 14 = sample every 3.75 usec•Ex: 241 lines / 10 = sample every 24 linesFrom wvlib\cs150\check3.schTwo Cycle Write•52.4 usec / 196 = 0.27 usec•10 MHz CLK = 0.1 usec per cycle•Only have 1/2 cycle for stable ADDRCLKWE WE_OUTOFD_1OPADD QLOC=P14OE, UART_OE, AD_OE•Now have three registers on D bus•Add separate UART_OE. Change:Old lab9pinout.sch Change lab9pinout.sch:OE, UART_OE, AD_OE, cont.•Add OFD to OE (if you haven’t already)•Add AD_OE (already in check3.sch):Processing A/D data•While reading A/D: send directly to SRAM•During PWM: shift from 8 bit to 5 bit•Also, adjust to min/max A/D valuesTo Do: In Lab•Test camera on television•Look at video signal on oscilloscope•Test bit file u:wvlib\cs150\check3.bitTo Do: Check Your Circuit•View comp. sync. and WE–should see 14 or 196 WE per comp.sync.•View vert. sync., WE and ROW_INC–should see WE pulse block between syncs.–should see 10 or 210 ROW_INC per vert sync.To Do: Checkoffs•Valid comp. and vert. sync. from LM1881•Show A/D CLK and D[7:0] and SRAM WE on oscilloscopeHints•Save CLBs: remove LED_BLOCK, ROM•Modularize each FSM: reset, enable, done:UART_RESETUART_ENABLECLKSERIAL_CLEANRESETENABLECLKSERIAL_CLEANDONEDATA[7:0]UART_DONEUARTDATA[7:0]CLKNS0 PS0FDRED QENABLE CERESET RGeneral Debugging•Get simplest part working:•Example: checkpoint 2–Light up all LEDs on row 3–Light up all LEDs with intensity 16–receive one byte from PTEST.EXE (^A = 0x01) and light up all LEDsGeneral Debugging•Implementation log:–“No load on xxx” is OK–“No driver on xxx” not OK•“I can’t find the part giving the error!”:–1. Make a copy of schematics–2. Rip out sections and re-implement until error goes away–3. Add sections back in: ISOLATE.General Debugging•Don’t assume equipment works:–“This pin is always zero”: Does the oscilloscope even work? Try touching +5V–“My RS232 Rout has no output”: Does it have an input? Is anything coming down the serial cable? (Test just the serial cable (after testing your scope probe on +5V (after testing that your power supply puts out +5V)))General Debugging•Make the simulation work first•Use NUMLED1 to watch counters•Make a new counter and watch on NUMLED1•Use the oscilloscope!–Send signals to ERROR, NUMLED1 pins–Use “single” trigger to catch eventGeneral Debugging•Make sure you read about Xilinx part before you use it. (Ex: CD8RE)•Read the newsgroup–(If you don’t know how, you’re an engineer: Find out)•SIMPLIFY and


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Berkeley COMPSCI 150 - CS 150 Checkpoint

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