8/30/2007EECS150-F05 CMOS lec021© UC BerkeleyEECS 150 - Components and Design Techniques for Digital SystemsLec 02 – Gates and CMOS Technology8-30-07David CullerElectrical Engineering and Computer SciencesUniversity of California, Berkeleyhttp://www.eecs.berkeley.edu/~cullerhttp://inst.eecs.berkeley.edu/~cs1508/30/2007EECS150-F05 CMOS lec022© UC BerkeleyOutline• Summary of last time• Overview of Physical Implementations• Boolean Logic• CMOS devices• Combinational Logic• Announcements/Break• CMOS transistor circuits– basic logic gates– tri-state buffers– flip-flops» flip-flop timing basics» example use» circuits8/30/2007EECS150-F05 CMOS lec023© UC BerkeleyL01 Summary: Digital DesignGiven a functional description and performance, cost, & power constraints, come up with an implementation using a set of primitives. • How do we learn how to do this? 1. Learn about the primitives and how to generate them. 2. Learn about design representation. 3. Learn formal methods to optimally manipulate the representations. 4. Look at design examples. 5. Use trial and error - CAD tools and prototyping. • Digital design is in some ways more an art than a science. The creative spirit is critical in combining primitive elements & other components in new ways to achieve a desired function.• However, unlike art, we have objective measures of a design: performance cost power & Time to Market8/30/2007EECS150-F05 CMOS lec024© UC BerkeleyThe Boolean Abstraction8/30/2007EECS150-F05 CMOS lec025© UC BerkeleyTechnology State 0 State 1Relay logic Circuit Open Circuit ClosedCMOS logic 0.0-1.0 volts 2.0-3.0 voltsTransistor transistor logic (TTL) 0.0-0.8 volts 2.0-5.0 voltsFiber Optics Light off Light onDynamic RAM Discharged capacitorCharged capacitorNonvolatile memory (erasable) Trapped electrons No trapped electronsProgrammable ROM Fuse blown Fuse intactBubble memory No magnetic bubble Bubble presentMagnetic disk No flux reversal Flux reversalCompact disc No pit PitMapping from physical world to binary worldSense the logical value, manipulate in s systematic fashion.8/30/2007EECS150-F05 CMOS lec026© UC BerkeleyX Y 16 possible functions (F0–F15)0 000000000111111110 100001111000011111 000110011001100111 10101010101010101XYFXYX nor Ynot(X or Y)X nandYnot(X and Y)10not XX and YX orYnotYX xor YX = YPossible Logic Functions of Two Variables• 16 possible functions of 2 input variables:– 2**(2**n) functions of n inputs8/30/2007EECS150-F05 CMOS lec027© UC BerkeleyX, Y are Boolean algebra variablesXYX •Y00001 0100111X Y X' Y' X • Y X' • Y' ( X • Y ) + ( X' • Y' )001 1 0 1 101 1 00 0 010010 0 011001 0 1( X • Y ) + ( X' • Y' ) ≡ X = YX Y X' X' • Y001 001 1 110001100Boolean expression that is true when the variables X and Y have the same valueand false, otherwiseLogic Functions and Boolean Algebra• Any logic function that can be expressed as a truth table can be written as an expression in Boolean algebra using the operators: ', +, and •8/30/2007EECS150-F05 CMOS lec028© UC BerkeleyX Y X nand Y00 111 0X Y X nor Y00 111 0X nand Y ≡ not ( (not X) nor (not Y) )X norY ≡ not ( (not X) nand (not Y) )Minimal set of functions• Implement any logic functions from NOT, NOR, and NAND?– For example, implementing X and Yis the same as implementing not(X nand Y)• Do it with only NOR or only NAND– NOT is just a NAND or a NOR with both inputs tied together– and NAND and NOR are "duals", i.e., easy to implement one using the other8/30/2007EECS150-F05 CMOS lec029© UC Berkeleytimechange in Y takes time to "propagate" through gatesWaveform View of Logic Functions• Just a sideways truth table– But note how edges don't line up exactly– It takes time for a gate to switch its output!8/30/2007EECS150-F05 CMOS lec0210© UC BerkeleyT1T2use of 3-input gateABCDT2T1ZABCDZFrom Boolean Expressions to Logic Gates• More than one way to map expressions to gates– e.g., Z = A' • B' • (C + D) = (A' • (B' • (C + D)))8/30/2007EECS150-F05 CMOS lec0211© UC Berkeley(X + Y)' = X' • Y'NOR is equivalent to AND with inputs complemented(X • Y)' = X' + Y'NAND is equivalent to OR with inputs complementedX Y X' Y' (X + Y)' X' • Y'001 101 1 010011100X Y X' Y' (X • Y)' X' + Y'001 101 1 010011100Proving theorems (perfect induction)• De Morgan’s Law– complete truth table, exhaustive proof1000111010001110==Push inv. bubble from output to input and change symbol8/30/2007EECS150-F05 CMOS lec0212© UC BerkeleyAn algebraic structure• An algebraic structure consists of– a set of elements B– binary operations { + , • }– and a unary operation { ' }– such that the following axioms hold:1. set B contains at least two elements, a, b, such that a ≠ b2. closure: a + b is in B a • b is in B3. commutativity: a + b = b + a a • b = b • a4. associativity: a + (b + c) = (a + b) + c a • (b • c) = (a • b) • c5. identity: a + 0 = a a • 1 = a6. distributivity: a + (b • c) = (a + b) • (a + c) a • (b + c) = (a • b) + (a • c)7. complementarity: a + a' = 1 a • a' = 0More on this later8/30/2007EECS150-F05 CMOS lec0213© UC BerkeleyTechnology State “0” State “1”Relay logic Circuit Open Circuit ClosedCMOS logic 0.0-1.0 volts 2.0-3.0 voltsTransistor transistor logic (TTL) 0.0-0.8 volts 2.0-5.0 voltsFiber Optics Light off Light onDynamic RAM Discharged capacitorCharged capacitorNonvolatile memory (erasable) Trapped electrons No trapped electronsProgrammable ROM Fuse blown Fuse intactBubble memory No magnetic bubble Bubble presentMagnetic disk No flux reversal Flux reversalCompact disc No pit PitMapping from physical world to binary worldSense the logical value, manipulate in s systematic fashion.8/30/2007EECS150-F05 CMOS lec0214© UC BerkeleyOverview of Physical Implementations• Integrated Circuits (ICs)– Combinational logic circuits, memory elements, analog interfaces. • Printed Circuits boards (PCBs) – substrate for ICs and interconnection, distribution of CLK, Vdd, and GND signals, heat dissipation. • Power Supplies– Converts line AC voltage to regulated DC low voltage levels. • Chassis (rack, card case, ...) – holds boards, power supply, provides physical interface to user or other systems. • Connectors and Cables. The stuff out of which we make systems.8/30/2007EECS150-F05 CMOS lec0215© UC BerkeleyIntegrated Circuits• Primarily Crystalline Silicon• 1mm - 25mm on a side• 100 - 200M
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