EECS 150 - Components and Design Techniques for Digital SystemsLec 19 – Fixed Point Arithmetic & Register Transfers Level (RTL) Design11/2/2004David CullerElectrical Engineering and Computer SciencesUniversity of California, Berkeleyhttp://www.eecs.berkeley.edu/~cullerhttp://www-inst.eecs.berkeley.edu/~cs150vote dayIntroduction to High Level Digital Design• High-level Design Specifies:– How data is moved around and operated on.– The architecture (sometimes called micro-architecture):» The organization of state elements and combinational logic blocks» Functional specification of combinational logic blocks• Optimization– Deals with the task of modifying an architecture and data movement procedure to meet some particular design requirement:» performance, cost, power, or some combination.• Most designers spend most of their time on high-level organization and optimization– modern CAD tools help fill in the low-level details and optimization» gate-level minimization, state-assignment, etc.– A great deal of the leverage on effecting performance, cost, andpower comes at the high-level.Recall: Computer Number Systems• Positional notation– Dn-1Dn-2…D0represents Dn-1Bn-1+ Dn-2Bn-2+ …+ D0B0 where Di∈∈∈∈ { 0, …, B-1 }• 2s Complement– Dn-1Dn-2…D0represents: - Dn-12n-1+ Dn-22n-2+ …+ D020– MSB has negative weight• Binary Point is effectively at the far right of the word0000000100100011100001010110010010011010101111001101011111101111+0+1+2+3+4+5+6+7-8-7-6-5-4-3-2-10000…Representing Fractional Numbers• Fixed-Point Positional notation– Dn-k-1Dn-k-2…D0…D-krepresents Dn-k-1Bn-k-1+ Dn-2Bn-2+ …+ D-kB-k where Di∈∈∈∈ { 0, …, B-1 }• 2s Complement– Dn-k-1Dn-2…D-krepresents: - Dn-k-12n-k-1+ Dn-22n-2+ …+ D-k2-k0000000100100011100001010110010010011010101111001101011111101111+0+1/4+1/2+3/4+1+5/4+3/2+7/4-2-7/4-3/2-5/4-1-3/4-1/2-1/4Circuits for Fixed-Point Arithmetic• Adders?– identical circuit– Position of the binary point is entirely in the intepretation– Be sure the interpretations match» i.e. binary points line up• Subtractors?• Multipliers?– Position of the binary point just as you learned by hand– Mult Two n-bit numbers yields 2n-bit result with binary point determined by binary point of the inputs– 2-k* 2-m= 2-k-m+*Example: Pong Project• Pixel Position – Board 720 x 507– 10 bits each– BinPt to the far right• Paddle– Pixel position– Velocity in pixels/frame» 8 bits– PdlPos( f+1 ) = PdlPos( f ) + Vel every frame• Ball– subpixel = pixel/256– subframetime = frametime/256» Note: pix per frame == subpix per subframe– Ball position represented as subpixels– Update subpixel position every subframe– Render pixel pos every frame– Max movement per frame» 255/256 of a pixel507720Arithmetic Representation• Position of binary point represents a trade-off of range vs precision– Many digital designs operate in fixed point» Very efficient, but need to know the behavior of the intended algorithms» True for many software algorithms too– General purpose numerical computing generally done in floating point» Essentially scientific notation» Fixed sized field to represent the fractional part and fixed number of bits to represent the exponent» ± 1.fraction x 2^ exp– Some DSP algorithms used block floating point» Fixed point, but for each block of numbers an additional value specifies the exponent. Design hierarchyLevels of Design RepresentationTransfer FunctionTransistor PhysicsDevicesGatesCircuitsFlipFlopsEE 40HDLMachine OrganizationInstruction Set ArchPgm Language Asm / Machine LangCS 61CA Standard High-level Organization• Controller– accepts external and control input, generates control and external output and sequences the movement of data in the datapath.• Datapath– is responsible for data manipulation. Usually includes a limited amount of storage.• Memory– optional block used for long term storage of data structures.• Standard model for CPUs, micro-controllers, many other digital sub-systems.• Usually not nested.• Often cascaded:Announcements• Homework due Friday as usual• Mid Term on 11/9• “Putting it together”lecture on Thurs (by Stan)• Review session – Monday November 8th from 5:30-8pm. • Digital Design in the News– Prof. David Wagner, Digital Democracyvote dayComputer Organization• Computer design as an application of digital logic design procedures• Computer = processing unit + memory system• Processing unit = control + datapath• Control = finite state machine– Inputs = machine instruction, datapath conditions– Outputs = register transfer control signals, ALU operation codes– Instruction interpretation = instruction fetch, decode, execute• Datapath = functional units + registers + interconnect– Functional units = ALU, multipliers, dividers, etc.– Registers = program counter, shifters, storage registers– Interconenct = busses and wires• Instruction Interpreter vs Fixed Function DeviceRegister Transfer Level Descriptions• A standard high-level representation for describing systems.• It follows from the fact that all synchronous digital system can be described as a set of state elements connected by combination logic (CL) blocks:• RTL comprises a set of register transfers with optional operators as part of the transfer.• Example:regA ←←←← regBregC ←←←← regA + regBif (start==1) regA ←←←← regC• Personal style:– use “;” to separate transfers that occur on separate cycles.– Use “,” to separate transfers that occur on the same cycle.• Example (2 cycles):regA ←←←← regB, regB ←←←← 0;regC ←←←← regA;reg regCL CLclock inputoutputoption feedbackinputoutputRTL building blocks: Tri-State Buffers• 0, 1, Z (high impedance state) ! ! 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