DOC PREVIEW
Berkeley COMPSCI 150 - Lecture 23 - Arithmetic Blocks, Part 2 + Shifters

This preview shows page 1-2-3-4 out of 13 pages.

Save
View full document
View full document
Premium Document
Do you want full access? Go Premium and unlock all 13 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 13 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 13 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 13 pages.
Access to all documents
Download any document
Ad free experience
Premium Document
Do you want full access? Go Premium and unlock all 13 pages.
Access to all documents
Download any document
Ad free experience

Unformatted text preview:

Spring 2011EECS150 - Lec23-arith2Page EECS150 - Digital DesignLecture 23 - Arithmetic Blocks, Part 2 + ShiftersApril 12, 2011John Wawrzynek1Spring 2010 EECS150 - Lec24-arith2Page Multiplication a3 a2 a1 a0 Multiplicand b3 b2 b1 b0 Multiplier X a3b0 a2b0 a1b0 a0b0 a3b1 a2b1 a1b1 a0b1 Partial a3b2 a2b2 a1b2 a0b2 productsa3b3 a2b3 a1b3 a0b3 . . . a1b0+a0b1 a0b0 Product Many different circuits exist for multiplication.Each one has a different balance between speed (performance) and amount of logic (cost).2Spring 2010 EECS150 - Lec24-arith2Page “Shift and Add” Multiplier• Sums each partial product, one at a time.• In binary, each partial product is shifted versions of A or 0.Control Algorithm: 1. P ← 0, A ← multiplicand, B ← multiplier 2. If LSB of B==1 then add A to P else add 0 3. Shift [P][B] right 1 4. Repeat steps 2 and 3 n-1 times. 5. [P][B] has product.•Cost α n, Τ = n clock cycles.• What is the critical path for determining the min clock period?3Spring 2010 EECS150 - Lec24-arith2Page “Shift and Add” MultiplierSigned Multiplication: Remember for 2’s complement numbers MSB has negative weight: ex: -6 = 110102 = 0•20 + 1•21 + 0•22 + 1•23 - 1•24 = 0 + 2 + 0 + 8 - 16 = -6• Therefore for multiplication: a) subtract final partial product b) sign-extend partial products• Modifications to shift & add circuit: a) adder/subtractor b) sign-extender on P shifter register 4Spring 2010 EECS150 - Lec24-arith2Page Bit-serial Multiplier• Bit-serial multiplier (n2 cycles, one bit of result per n cycles):• Control Algorithm:repeat n cycles { // outer (i) loop repeat n cycles{ // inner (j) loop shiftA, selectSum, shiftHI } shiftB, shiftHI, shiftLOW, reset}Note: The occurrence of a controlsignal x means x=1. The absenceof x means x=0.5Spring 2010 EECS150 - Lec24-arith2Page Array MultiplierEach row: n-bit adder with AND gatesWhat is the critical path?Single cycle multiply: Generates all n partial products simultaneously.6Spring 2010 EECS150 - Lec24-arith2Page Carry-Save Addition• Speeding up multiplication is a matter of speeding up the summing of the partial products.• “Carry-save” addition can help.• Carry-save addition passes (saves) the carries to the output, rather than propagating them.• Example: sum three numbers, 310 = 0011, 210 = 0010, 310 = 0011 310 0011+ 210 0010 c 0100 = 410 s 0001 = 110 310 0011 c 0010 = 210 s 0110 = 610 1000 = 810 carry-save addcarry-save addcarry-propagate add• In general, carry-save addition takes in 3 numbers and produces 2.• Whereas, carry-propagate takes 2 and produces 1.• With this technique, we can avoid carry propagation until final addition 7Spring 2010 EECS150 - Lec24-arith2Page Carry-save Circuits• When adding sets of numbers, carry-save can be used on all but the final sum.• Standard adder (carry propagate) is used for final sum.• Carry-save is fast (no carry propagation) and cheap (same cost as ripple adder)8Spring 2010 EECS150 - Lec24-arith2Page Array Multiplier using Carry-save AdditionFast carry-propagate adder9Spring 2010 EECS150 - Lec24-arith2Page Carry-save AdditionCSA is associative and communitive. For example: (((X0 + X1) + X2 ) + X3 ) = ((X0 + X1) +( X2 + X3 ))• A balanced tree can be used to reduce the logic delay.• This structure is the basis of the Wallace Tree Multiplier.• Partial products are summed with the CSA tree. Fast CPA (ex: CLA) is used for final sum.•Multiplier delay α log3/2N + log2N10Spring 2010 EECS150 - Lec24-arith2Page Constant Multiplication• Our discussion so far has assumed both the multiplicand (A) and the multiplier (B) can vary at runtime.• What if one of the two is a constant? Y = C * X• “Constant Coefficient” multiplication comes up often in signal processing and other hardware. Ex: yi = αyi-1+ xi where α is an application dependent constant that is hard-wired into the circuit.• How do we build and array style (combinational) multiplier that takes advantage of the constancy of one of the operands?xiyi11Spring 2010 EECS150 - Lec24-arith2Page Multiplication by a Constant• If the constant C in C*X is a power of 2, then the multiplication is simply a shift of X. • Ex: 4*X• What about division?• What about multiplication by non- powers of 2?12Spring 2010 EECS150 - Lec24-arith2Page Multiplication by a Constant• In general, a combination of fixed shifts and addition:– Ex: 6*X = 0110 * X = (22 + 21)*X– Details:13Spring 2010 EECS150 - Lec24-arith2Page Multiplication by a Constant•Another example: C = 2310 = 010111• In general, the number of additions equals the number of 1’s in the constant minus one.• Using carry-save adders (for all but one of these) helps reduce the delay and cost, but the number of adders is still the number of 1’s in C minus 2.• Is there a way to further reduce the number of adders (and thus the cost and delay)?14Spring 2010 EECS150 - Lec24-arith2Page Multiplication using Subtraction• Subtraction is ~ the same cost and delay as addition.•Consider C*X where C is the constant value 1510 = 01111. C*X requires 3 additions.• We can “recode” 15 from 01111 = (23 + 22 + 21 + 20 ) to 10001 = (24 - 20 ) where 1 means negative weight.• Therefore, 15*X can be implemented with only one subtractor.15Spring 2010 EECS150 - Lec24-arith2Page Canonic Signed Digit Representation• CSD represents numbers using 1, 1, & 0 with the least possible number of non-zero digits. – Strings of 2 or more non-zero digits are replaced.– Leads to a unique representation.• To form CSD representation might take 2 passes:– First pass: replace all occurrences of 2 or more 1’s: 01..10 by 10..10– Second pass: same as a above, plus replace 0110 by 0010• Examples:• Can we further simplify the multiplier circuits? 0010111 = 2300110010101001 = 32 - 8 - 1011101 = 29100101 = 32 - 4 + 10110110 = 5410110101001010 = 64 - 8 - 216Spring 2010 EECS150 - Lec24-arith2Page “Constant Coefficient Multiplication” (KCM)Binary multiplier: Y = 231*X = (27 + 26 + 25 + 22 + 21+20)*X• CSD helps, but the multipliers are limited to shifts followed by adds.– CSD multiplier: Y = 231*X = (28 - 25 + 23 - 20)*X• How about shift/add/shift/add …?– KCM multiplier: Y = 231*X = 7*33*X = (23 - 20)*(25


View Full Document

Berkeley COMPSCI 150 - Lecture 23 - Arithmetic Blocks, Part 2 + Shifters

Documents in this Course
Lab 2

Lab 2

9 pages

Debugging

Debugging

28 pages

Lab 1

Lab 1

15 pages

Memory

Memory

13 pages

Lecture 7

Lecture 7

11 pages

SPDIF

SPDIF

18 pages

Memory

Memory

27 pages

Exam III

Exam III

15 pages

Quiz

Quiz

6 pages

Problem

Problem

3 pages

Memory

Memory

26 pages

Lab 1

Lab 1

9 pages

Memory

Memory

5 pages

Load more
Download Lecture 23 - Arithmetic Blocks, Part 2 + Shifters
Our administrator received your request to download this document. We will send you the file to your email shortly.
Loading Unlocking...
Login

Join to view Lecture 23 - Arithmetic Blocks, Part 2 + Shifters and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view Lecture 23 - Arithmetic Blocks, Part 2 + Shifters 2 2 and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?