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Berkeley COMPSCI 150 - Project Checkpoint 2

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University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Science EECS 150 Mike Lowey Fall 2001 Project Checkpoint 2 CD-ROM Drive Control ATA/ATAPI CD-ROM Interface Specifications: In this stage of the project we will be implementing a small subset of the ATAPI CD-ROM interface commands. By using just 3 of the available CD-ROM commands we will be able to duplicate most of the controls on a normal CD player. Most hard-disk drives and CD-ROM drives are controlled by a standard known as ATA or the newer version ATAPI. ATAPI added a feature known as command packets to the older ATA standard (the –PI in ATAPI stands for Packet Interface). In the ATA interface, commands are sent to the drive using a system of command blocks. These blocks consist of 7 bytes of data being written to the drive in a particular order. Using this system the host device will write set-up parameters in to 6 registers and then write the command to be executed in to the command register. The command block structure, register addresses, and functions are in the pictures below.The registers are addressed using the signals CS0-, CS1-, DA2, DA1, and DA0. These signals are each specific wires on the 40-pin bus. CS0- and CS1- are active low, so in the table above they are zero when asserted. The complete list of the pins is below:In ATA data and command blocks are written to the registers using the lower 8 of the 16 data wires. The signals that control reading and writing to and from the registers are called DIOW- (write) and DIOR- (read). Both of these signals are active low as well. To write data to a register you should assert the address (CS0-, CS1-, DA0, DA1, DA2) , assert the data, and pull DIOR- low at the same time. Remember that some of the signals are active low. The only command block that we will use is the called PACKET. This command was added to the ATA standard to allow for the addition of a new set of commands. The structure for the PACKET command block is pictured above. Its command value is A0h. I have noticed that A0h will execute without having to set up any registers beforehand. You can just write the single command. When the PACKET command block is written the drive knows that the next command will be an ATAPI command packet. The structure of command packets is different than command blocks. Command packets are 12 bytes long and contain the command code in the first set of data written. In ATAPI reading and writing happen using all 16 data bits. The difference can be seen on the ATAPI register map below. This means that the bytes are written two at a time to the device. The lower numbered byte will be in the low order 8 bits and the higher numbered byte will be in the upper 8 bits. In ATAPI CS0- and CS1- are called CS1FX and CS3FX. The register map is read exactly the same way. Reading and writing data is also handled the same way as ATA except that the data now flows 16 bits at a time. Submitting the packet above would take 6 writes to the ATA command register (see the register map below). I think that they try to make the names as confusing as possible…To execute an ATAPI CD-ROM command packet we first write the ATA PACKET command block (A0h), wait, and then write the ATAPI command packet. The timing of these operations is very important. You must wait around 5µsec between writing A0h and beginning the CD-ROM command packet. The duration of each write or read is also very important. Writing out at our maximum clock speed of 16MHz gives us 62.5nsec / write. Anything slower than this won’t work so be careful to write to the bus as fast as possible. As the sequence of commands is written , you must leave a space between each write for the command to be interpreted correctly. I have been using 080000h (DIOR-, DIOW-, CS0-, CS1-, DA0, DA1, DA2, DD[15:0]) and it makes a good no-op. To wait for the 5µsec I write about 75 no-ops to the bus and then start the packet. I am sure that there are better ways to do it, but that is a start. This is a good time to start to consider the amount of redundant data in your design and begin to think about how to compress it.The ATAPI packet example above is the PLAY AUDIO MSF command. This is one of the commands that we will be using for the project. Its structure is very intuitive. The MSF format is a refreshingly simple way to address locations on the disk: M = minutes S = seconds F = frame NOTE: The term “frame” is used in two different ways in the CD-ROM media standard. The intended meaning can only be determined from the context. Whenever possible, this description replaces the larger data unit with the more familiar term sector. The primary exception to this policy is the use of frame when referring to the MSF address. In the MSF context, one frame (F field unit) equals one sector. On a typical two channel CD-DA media, each frame (F field unit) is played in 1/75th of a second. To play the section of music on the disk from 15-minutes to 20-minutes time you would write the following series of data words to the command register: 0047 - first 2 bytes – reserved and play op-code 1500 - starting M field and reserved 0000 - starting F field and starting S field 0020 - ending S field and ending M field 0000 - reserved and ending F field Reserved fields should get zeros. For this checkpoint we are going to give you an I/O block that has all of the pins set up correctly for you. It is a good idea to have all of your pins instantiated in one macro to keep track of them. It also makes it easier to find pins to use for debugging. This is a list of the pins that you will need to wire for the 40-pin connector: Xilinx cd pin# signal Pin# name 3 1 reset 4 3 DD7 5 4 DD8 6 5 DD6 7 6 DD9 8 7 DD5 9 8 DD10 10 9 DD4 14 10 DD11 18 11 DD329 12 DD12 51 13 DD2 61 14 DD13 62 15 DD1 68 16 DD14 69 17 DD0 56 18 DD15 77 21 DMARQ 50 23 DIOW- 35 25 DIOR- 36 27 IORDY 37 28 CSEL 38 29 DMACK- 39 31 INTRQ 40 32 RESERVED 44 34 PDIAG- 45 35 DA0 46 36 DA2 47 37 CS0- 48 38 CS1- 49 39 DASP- 40 33 DA1 Please wire the 40-pin connector as close to the end of the board with the power connectors as practical. You will need the space in the middle for more chips and it would be a problem to wire wrap around the IDE cable. You will be provided with a Chekpoint2.bit file that will test your wiring. Checkpoint …


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Berkeley COMPSCI 150 - Project Checkpoint 2

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