Berkeley COMPSCI 152 - Homework (19 pages)

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Homework



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Homework

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Pages:
19
School:
University of California, Berkeley
Course:
Compsci 152 - Computer Architecture and Engineering
Computer Architecture and Engineering Documents

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CS152 Homework I Fall 2006 Name SSID Homework I is due in class on Thursday September 28 at 11 10 AM This class is the Mid term I review session Late homeworks are NOT accepted Thus if you will not be attending the review session you MUST make arrangements to hand off the homework to the instructor before classtime Homework will be graded on effort did you make an honest attempt to solve each problem not correctness We will distribute the correct answers for the homework in the review session but we will probably not return the homework you hand in until after the exam So you may wish to make a copy for reference before you hand it in This homework will count for approximately 1 5 of your final grade The homework is based on the Mid term I exam from Fall 05 You may discuss the homework problems with fellow students and the TAs but what you write down must be your own work no copying the answers from someone else s homework Good luck John Lazzaro Points 1 10 2 15 3 10 4 10 5 15 6 15 7 10 8 15 Tot 100 1 Register File Design 10 points On the top slide on the next page we show the write logic for the register file design we showed in Lecture 1 2 Redesign the write logic for the register file so that two registers may be written on the same positive clock edge The 5 bit values ws1 and ws2 specify the registers to write the 1 bit values WE1 and WE2 enable writing for each port 1 enabled 0 disabled and the 32 bit values wd1 and wd2 are the data to be written If both write ports are enabled and ws1 and ws2 specify the same register this register MUST be written with the value wd1 Draw your final design on the bottom slide shown on the next page If you need to use a complex logic function in your answer define a truth table for a function f x y below the slide and draw boxes on the schematic labeled with f x y You may use standard symbols for simple gates OR gates AND gates multiplexers demultiplexers etc Work out your design below BEFORE drawing on the slide on the next



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