CS152 Homework I Fall 2006 Name SSID Homework I is due in class on Thursday September 28 at 11 10 AM This class is the Mid term I review session Late homeworks are NOT accepted Thus if you will not be attending the review session you MUST make arrangements to hand off the homework to the instructor before classtime Homework will be graded on effort did you make an honest attempt to solve each problem not correctness We will distribute the correct answers for the homework in the review session but we will probably not return the homework you hand in until after the exam So you may wish to make a copy for reference before you hand it in This homework will count for approximately 1 5 of your final grade The homework is based on the Mid term I exam from Fall 05 You may discuss the homework problems with fellow students and the TAs but what you write down must be your own work no copying the answers from someone else s homework Good luck John Lazzaro Points 1 10 2 15 3 10 4 10 5 15 6 15 7 10 8 15 Tot 100 1 Register File Design 10 points On the top slide on the next page we show the write logic for the register file design we showed in Lecture 1 2 Redesign the write logic for the register file so that two registers may be written on the same positive clock edge The 5 bit values ws1 and ws2 specify the registers to write the 1 bit values WE1 and WE2 enable writing for each port 1 enabled 0 disabled and the 32 bit values wd1 and wd2 are the data to be written If both write ports are enabled and ws1 and ws2 specify the same register this register MUST be written with the value wd1 Draw your final design on the bottom slide shown on the next page If you need to use a complex logic function in your answer define a truth table for a function f x y below the slide and draw boxes on the schematic labeled with f x y You may use standard symbols for simple gates OR gates AND gates multiplexers demultiplexers etc Work out your design below BEFORE drawing on the slide on the next page Only the next page will be graded From Lecture 1 2 Register File Design clk ws 5 WE R0 The constant 0 D D E M U X D Q En R1 Q En R2 Q D En R31 Q 32 wd ws1 clk 5 R0 Constant 0 D Q En R1 Q En R2 Q WE1 WE2 D D 5 ws2 32 wd1 32 wd2 En R31 Q 2 Single Cycle Design 15 points Below we show a slightly modified version of the single cycle datapath that we derived in the first weeks of class On the following pages we ask questions about this design Single cycle instruction fetch modified 32 PC 32 32 1 D 32 Addr Q Data 32 0 0x4 Instr Mem 32 32 PCSrc Clk imm Ext 1 rd1 0 Note imm is immediate field from Iformat bitfield Ext unit sign extends does word byte shif t 32 Note rd1 is output from register file BRSrc Mux control 0 is lower mux input 1 upper mux input Single cycle datapath modified R format op rs rt I format op rs rt 5 rs rt rs 1 rt 5 5 0 RegDest rs2 ws op rd1 rd2 RegWr funct ALUctr 32 WE shamt imm RegFile rs1 wd 32 rd 1 32 Data Memory 32 1 imm Ext ExtOp 32 0 A L U 32 Addr Equal 32 Dout 0 Din 32 WE MemToReg ALUsrc MemWr Mux control 0 is lower mux input 1 upper mux input RegWr MemWr 1 write 0 no write ExtOp 1 sign extend 0 zero extend Question 2a 5 points We wish to add a new I format opcode to the instruction set named LWA Load Word and Autoupdate index The purpose of LWA is to read a block of memory by invoking LWA many times without needing to update the index register value by executing add instructions In the definition below rs and rt refer to the register coded in the rs and rt I format fields and imm refers to the constant coded in the immediate field Syntax LWA rt imm rs Actions rt M rs sign extended imm rs rs sign extended imm Note that the M memory access uses the rs value present at the start of the instruction not the updated value written at the end of the instruction In this question you are to evaluate how to add LWA to the datapath Is the datapath as shown able to execute LWA In answering this question assume that you MAY add a new instruction to the ALU this function may be any Boolean function of the two ALU inputs but you may NOT otherwise change the datapath Circle YES or NO below X points YES NO If your answer is yes fill out the table control values needed for this instruction Each box should be filled with a 0 1 or X don t care A 0 or 1 that could have been an X counts as incorrect Also specify the ALU function BRSrc PCSrc RegDest RegWr ExtOp ALUSrc MemWr MemToReg Express ALU function below as a function of A upper input and B lower input Specify if equation is boolean or numeric specify if constants are in decimal or hex Function for ALU If the answer is no precisely state how to modify the datapath to support the instruction in 30 words or less Fuzzy answers get 0 credit fuzzy example add more registers and wires If answer is no write your statement below Question 2b 5 points We wish to add a new I format opcode to the instruction set named SWA Store Word and Autoupdate index The purpose of SWA is to write a block of memory by invoking SWA many times without needing to update the index register value by executing add instructions In the definition below rs and rt refer to the register coded in the rs and rt I format fields and imm refers to the constant coded in the immediate field Syntax SWA rt imm rs Actions M rs sign extended imm rt rs rs sign extended imm Note that the M memory access uses the rs value present at the start of the instruction not the updated value written at the end of the instruction In this question you are to evaluate how to add SWA to the datapath Is the datapath as shown able to execute SWA In answering this question assume that you MAY add a new instruction to the ALU this function may be any Boolean function of the two ALU inputs but you may NOT otherwise change the datapath Circle YES or NO below X points YES NO If your answer is yes fill out the table control values needed for this instruction Each box should be filled with a 0 1 …
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