CS 152 Computer Architecture and Engineering Lecture 22 Graphics Processors 2006 11 14 John Lazzaro www cs berkeley edu lazzaro TAs Udam Saini and Jue Sun www inst eecs berkeley edu cs152 CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 1 Today Graphics Processors Computer Graphics A brief introduction to the pipeline Stream Processing Casting the graphics pipeline into hardware Unified Pipelines GeForce 8800 the new architecture from Nvidia CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 2 C H A P T E R 2 Recall Mac Mini G4 System Diagram Architecture AGP 4X Block Hi Speed Graphics Bus diagram Figure 2 1 Dedicated Graphics RAM DDR SDRAM DIMM slot PowerPC G4 microprocessor L2 cache 512K 1 1 167 MHz MaxBus AGP 4X bus 167 MHz Memory bus Hard disk Device 0 Ultra drive ATA 100 bus Radeon 9200 graphics IC 32 MB DDR RAM Intrepid memory controller and I O device ATI Radeon 9200 Graphics Processing Unit GPU DVI VGA composite S video output port To Display FireWire PHY FireWire 400 port Ethernet PHY Ethernet port 10 100 Mbps I2S Audio Headphone audio Average selling price ASP for GPUs 30line out jack codec CS 152 L20 Buses Disks and RAID Built in speaker UC Regents Fall 2006 UCB 3 2560 A b o u t 12 M B f ra m e 24 bi t 24 f r a m pi xe ls e s se c 3 00 M B s ec ond CS 152 L22 Graphics Processors 1 6 0 0 UC Regents Fall 2006 UCB 4 e A dumb graphics card T E R 2 AGP 4X 1 1 GB s Can handle 24 f s 300 MB s for a Block diagram 2560x1600 display E R 2 12 MB Frame Buffer PowerPC G4 microprocessor L2 cache 512K 1 1 167 MHz MaxBus 12 MB Frame Buffer Double Buffering CPU writes next frame in one buffer Control DVI VGA composite S video ock diagram logic sends output port AM Control Logic 167 MHz this ot Memory 32 MB PowerPCCPU G4 Problem has bus frame DDR RAM microprocessor L2 cache 512K a 1 1 new to compute DVI Formatter D A out of FireWire FireWire 400 port pixel 10 ns 167every MHz PHY other MaxBus AGP 4X 10 clock cycles for Radeon Ethernet Ethernet port bus buffer to DVI VGA composite S video 9200 PHY 10 100 Mbps a 1 GHz CPU clock graphics IC output port display Device 0 AGP 4X bus CS 152 L22 Graphics Processors 167 MHz Intrepid Ultra Memory I2S memory ATA 100 Radeon 9200 graphics IC UC Regents Fall 2006 UCB 32 MBAudio 5 Q What kind of graphics are we accelerating A In 2006 interactive entertainment 3 D games In the 1990s 2 D acceleration fast windowing systems games like Pac Man Graphics Acceleration Q In a multi core world why should we use a special processor for graphics A Programmers generally use a certain coding style for graphics We can design a processor to fit the style Next An intro to 3 D graphics CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 6 The Triangle Simplest closed shape that may be defined by straight edges With enough triangles you can make anything CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 7 A cube whose faces are made up of triangles This is a 3 D model of a cube model includes faces we can t see in this view A sphere whose faces are made up of triangles With enough triangles the curvature of the sphere can be made arbitrarily smooth CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 8 A teapot famous object in computer graphics history A wire frame of triangles can capture the 3 D shape of complex man made objects CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 9 Triangle defined by 3 vertices By transforming v f v all vertices in a 3 D object like the teapot you can move it in the 3 D world change it s size rotate it etc vertex vo xo yo zo vertex v1 x1 y1 z1 vertex v2 x2 y2 z2 If a teapot has 10 000 triangles need to transform 30 000 vertices to move it in a 3 D scene per frame CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 10 Vertex can have color lighting info If vertices colors are different this means that a smooth gradient of color washes across triangle vertex vo ro go bo vertex v1 r1 g1 b1 vertex v2 r2 g2 b2 More realistic graphics models include light sources in the scene Per vertex information can carry information about how light hits the vertex CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 11 We see a 2 D window into the 3 D world CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 12 From 3 d triangles to screen pixels First project each 3 D triangle that might face the eye onto the image plane Then create pixel fragments on the boundary of the image plane triangle Then create pixel fragments to fill in the triangle rasterization Why pixel fragments A screen pixel color might depend on many triangles example a glass teapot CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 13 Process each fragment to shade it Algorithmic approach Per pixel computational model of metal and how light reflects off of it Move teapot and what reflects off it changes CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 14 Process each fragment to shade it Artistic approach Artist paints surface of teapot in Photoshop We map this texture onto each pixel fragment during shading Final step Output Merge Assemble pixel fragments to make final 2 d image pixels CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 15 Applying texture maps Quality matters Good algorithm B and C look blurry 5 67 8 679 7 9 6 0 1 2334 5 1 1 1 610 1 7 1 8 9 8 8 8 1 1 1 1 A 7 8 1 7 80 1 1 B3 8 7 C 1 D 5 E F 7 7 E 1 G 8 H 11 1 7E 0 1 7 F 0 8 1 610 5 1 11 8 1 Better algorithm B and C are detailed 5 67 8 679 7 9 6 0 1 2334 5 1 1 1 610 1 7 1 8 9 8 8 8 1 1 1 1 A 7 8 1 7 80 1 1 B3 8 7 C 1 D 5 E F 7 7 E 1 G 8 H 11 1 7E 0 1 7 F 0 8 1 610 5 1 11 8 1 CS 152 L22 Graphics Processors UC Regents Fall 2006 UCB 5 67 2 A 7 5 9 6 B C DD 16 Putting it All Together Luxo Jr Short movie made by Pixar shown at SIGGRAPH in 1986 First Academy Award given to a computer graphics movie CS 152 L22 Graphics Processors UC …
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