Unformatted text preview:

CS 152 Computer Architecture and Engineering Lecture 3 From CISC to RISC Krste Asanovic Electrical Engineering and Computer Sciences University of California at Berkeley http www eecs berkeley edu krste http inst eecs berkeley edu cs152 January 26 2011 CS152 Spring 2011 Last Time in Lecture 2 ISA is the hardware software interface Defines set of programmer visible state Defines instruction format bit encoding and instruction semantics Examples MIPS x86 IBM 360 JVM Many possible implementations of one ISA 360 implementations model 30 c 1964 z11 c 2010 x86 implementations 8086 c 1978 80186 286 386 486 Pentium Pentium Pro Pentium 4 c 2000 Core 2 Duo Nehalem AMD Athlon Transmeta Crusoe SoftPC MIPS implementations R2000 R4000 R10000 R18K JVM HotSpot PicoJava ARM Jazelle Microcoding straightforward methodical way to implement machines with low logic gate count and complex instructions January 26 2011 CS152 Spring 2011 2 Iron Law of Processor Performance Time Instructions Cycles Time Program Program Instruction Cycle Instructions per program depends on source code compiler technology and ISA Cycles per instructions CPI depends upon the ISA and the microarchitecture Time per cycle depends upon the microarchitecture and the base technology January 26 2011 CS152 Spring 2011 3 CPI for Microcoded Machine 7 cycles 5 cycles Inst 1 Inst 2 10 cycles Inst 3 Time Total clock cycles 7 5 10 22 Total instructions 3 CPI 22 3 7 33 CPI is always an average over a large number of instructions January 26 2011 CS152 Spring 2011 4 Technology Influence When microcode appeared in 50s different technologies for Logic Vacuum Tubes Main Memory Magnetic cores Read Only Memory Diode matrix punched metal cards Logic very expensive compared to ROM or RAM ROM cheaper than RAM ROM much faster than RAM But seventies brought advances in integrated circuit technology and semiconductor memory January 26 2011 CS152 Spring 2011 5 First Microprocessor Intel 4004 1971 4 bit accumulator architecture 8 m pMOS 2 300 transistors 3 x 4 mm2 750kHz clock 8 16 cycles inst Made possible by new integrated circuit technology January 26 2011 CS152 Spring 2011 6 Microprocessors in the Seventies Initial target was embedded control First micro 4 bit 4004 from Intel designed for a desktop printing calculator Constrained by what could fit on single chip Single accumulator architectures similar to earliest computers Hardwired state machine control 8 bit micros 8085 6800 6502 used in hobbyist personal computers Micral Altair TRS 80 Apple II Usually had 16 bit address space up to 64KB directly addressable Often came with simple BASIC language interpreter built into ROM or loaded from cassette tape January 26 2011 CS152 Spring 2011 7 VisiCalc the first killer app for micros Microprocessors had little impact on conventional computer market until VisiCalc spreadsheet for Apple II Apple II used Mostek 6502 microprocessor running at 1MHz Floppy disks were originally invented by IBM as a way of shipping IBM 360 microcode patches to customers Personal Computing Ad 1979 January 26 2011 CS152 Spring 2011 8 DRAM in the Seventies Dramatic progress in semiconductor memory technology 1970 Intel introduces first DRAM 1Kbit 1103 1979 Fujitsu introduces 64Kbit DRAM By mid Seventies obvious that PCs would soon have 64KBytes physical memory January 26 2011 CS152 Spring 2011 9 Microprocessor Evolution Rapid progress in size and speed through 70s fueled by advances in MOSFET technology and expanding markets Intel i432 Most ambitious seventies micro started in 1975 released 1981 32 bit capability based object oriented architecture Instructions variable number of bits long Severe performance complexity and usability problems Motorola 68000 1979 8MHz 68 000 transistors Heavily microcoded and nanocoded 32 bit general purpose register architecture 24 address pins 8 address registers 8 data registers Intel 8086 1978 8MHz 29 000 transistors Stopgap 16 bit processor architected in 10 weeks Extended accumulator architecture assembly compatible with 8080 20 bit addressing through segmented addressing scheme January 26 2011 CS152 Spring 2011 10 IBM PC 1981 Hardware Team from IBM building PC prototypes in 1979 Motorola 68000 chosen initially but 68000 was late IBM builds stopgap prototypes using 8088 boards from Display Writer word processor 8088 is 8 bit bus version of 8086 allows cheaper system Estimated sales of 250 000 100 000 000s sold Software Microsoft negotiates to provide OS for IBM Later buys and modifies QDOS from Seattle Computer Products Open System Standard processor Intel 8088 Standard interfaces Standard OS MS DOS IBM permits cloning and third party software January 26 2011 CS152 Spring 2011 11 Personal Computing Ad 11 81 January 26 2011 CS152 Spring 2011 12 Microprogramming early Eighties Evolution bred more complex micro machines Complex instruction sets led to need for subroutine and call stacks in code Need for fixing bugs in control programs was in conflict with read only nature of ROM WCS B1700 QMachine Intel i432 With the advent of VLSI technology assumptions about ROM RAM speed became invalid more complexity Better compilers made complex instructions less important Use of numerous micro architectural innovations e g pipelining caches and buffers made multiple cycle execution of reg reg instructions unattractive January 26 2011 CS152 Spring 2011 13 Analyzing Microcoded Machines John Cocke and group at IBM Working on a simple pipelined processor 801 and advanced compilers inside IBM Ported experimental PL 8 compiler to IBM 370 and only used simple register register and load store instructions similar to 801 Code ran faster than other existing compilers that used all 370 instructions up to 6MIPS whereas 2MIPS considered good before Emer Clark at DEC Measured VAX 11 780 using external hardware Found it was actually a 0 5MIPS machine although usually assumed to be a 1MIPS machine Found 20 of VAX instructions responsible for 60 of microcode but only account for 0 2 of execution VAX8800 Control Store 16K 147b RAM Unified Cache 64K 8b RAM 4 5x more microstore RAM than cache RAM January 26 2011 CS152 Spring 2011 14 IC Technology Changes Tradeoffs Logic RAM ROM all implemented using MOS transistors Semiconductor RAM same speed as ROM January 26 2011 CS152 Spring 2011 15 Nanocoding Exploits recurring control signal patterns in code e g ALU0 A Reg rs ALUi0 A Reg rs PC state code next state address code ROM nanoaddress nanoinstruction ROM data MC68000 had 17 bit


View Full Document

Berkeley COMPSCI 152 - Lecture 3 - From CISC to RISC

Documents in this Course
Quiz 5

Quiz 5

9 pages

Memory

Memory

29 pages

Quiz 5

Quiz 5

15 pages

Memory

Memory

29 pages

Memory

Memory

35 pages

Memory

Memory

15 pages

Quiz

Quiz

6 pages

Midterm 1

Midterm 1

20 pages

Quiz

Quiz

12 pages

Memory

Memory

33 pages

Quiz

Quiz

6 pages

Homework

Homework

19 pages

Quiz

Quiz

5 pages

Memory

Memory

15 pages

Load more
Loading Unlocking...
Login

Join to view Lecture 3 - From CISC to RISC and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view Lecture 3 - From CISC to RISC and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?