Slide 1Slide 2Slide 3Slide 4Slide 5Slide 6Slide 7Slide 8Slide 9Slide 10Slide 11Slide 12Slide 13Slide 14Slide 15Slide 16Slide 17Slide 18Slide 19Slide 20Slide 21Slide 22Slide 23Slide 24Slide 25Slide 26Slide 27Slide 28Slide 29Slide 30Slide 31Slide 32Slide 33Slide 34Slide 35Slide 36Slide 37Slide 38Slide 39Slide 40Slide 41Slide 42Slide 43Slide 44Slide 45Slide 46Slide 47Slide 48Slide 49Slide 50Slide 51Slide 52CS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCB2006-8-29John Lazzaro (www.cs.berkeley.edu/~lazzaro)CS 152 Computer Architecture and EngineeringLecture 1 – The MIPS ISAwww-inst.eecs.berkeley.edu/~cs152/And also, an intro to the course.And also, an intro to the course.TAs: Udam Saini and Jue SunUC Regents Fall 2006 © UCBCS 152 L1: The MIPS ISACS 152: Computer Design Team ProjectsIBM Power 5 “die photo”: a die is an unpackaged part Teams of4-5 studentsSingle-cycle CPU project3 weeksPipelined CPU3 weeksFinal Project5 weeksUC Regents Fall 2006 © UCBCS 152 L1: The MIPS ISACS 152: Real hardware, not simulationIntel XScale 80200: used in earlier HP PocketPCsWill we be fabricate CPU dies?Back when I was taking classes (1984 @ Caltech)our project course did fab chips.UC Regents Fall 2006 © UCBCS 152 L1: The MIPS ISAXilinxVirtex E43,200“parts” +655,000RAM bitsWriteVerilog to “wire”parts.FPGAs: Field Programmable Gate ArraysUC Regents Fall 2006 © UCBCS 152 L1: The MIPS ISACalinx: 150/152 boards in 125 CoryXilinxVirtex E FPGADRAMProgram Xilinx via PCDownload CPU machine code using TFTPUC Regents Fall 2006 © UCBCS 152 L1: The MIPS ISANow a GameBoy Advance cartridge!XilinxSpartan FPGA50,000 gates.16 MB SDRAM on the back side ...Seen at a Los Altos Hills Boy Scout meeting ...CS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCBCS 150 is a “hard” prerequisite for CS152Exceptions considered only for graduate students ...UC Regents Fall 2006 © UCBCS 152 L1: The MIPS ISAOne-slide descriptions of CPU projectsSingle-cycle CPU project3 weeksPipelined CPU3 weeksFinal Project5 weeksUC Regents Fall 2006 © UCBCS 152 L1: The MIPS ISA Lab 2: Single-Cycle CPU -- 8/29 to 9/2532rd1RegFile32rd2WE32wd5rs15rs25ws32ALU3232opLogic32Addr DataInstrMem32DPCQ3232+32320x4To rs1,rs2, ws, op decodelogic ...UC Regents Fall 2006 © UCBCS 152 L1: The MIPS ISALab 3: Pipelined CPU -- 9/26 to 10/16IRIRBAMInstr Fetch“IF” Stage“ID/RF” StageDecode & Reg Fetch1 2“EX” StageExecutionIRYM3IRR“MEM” StageMemoryWE, MemToReg4WB5WriteBackMux,LogicCS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCBProject: Caches + DRAM -- 10/17 to 11/20CS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCBThis course is not for everyone ...Hours SpentJill: 200 hoursBill: 200 hoursJoe: 100 hoursJack: 100 hours“We estimate our total people-hours spent on this project to be near 370 hours.”Typical final project time sheetsNote: Not a “prof” - “John” is OK (really)CS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCB“Can’t labs be easier but still worthwhile?”The labs and project teach you how to design two types of structures:Pipelines: Work on many instructions at the same time, and always get the right answer.Caches: A slow big memory looks like a fast big memory most of the time, and always maintain correct state.You only really understand these techniques after you make hardware do them. The first time you try, it takes time to get it right.And in conclusion…And in conclusion…Make the lab your home. Because it will be.Make the lab your home. Because it will be.From a Fall 05 Final Project Presentation ...CS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCBTeam Projects: 4-5 StudentsMembersBryantMichaelUdamDanielFrom a Spr 05 Final Project Talk ...... this group had good team dynamics.CS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCBBut, what if a teammate is like this?“In Lab 3, Pat did not perform to his capability. Besides not making it to most of the meetings and not completing his work on time,the work he did do I ended up redoing anyways.”“Often Pat did other work, slept, or played games while the rest of us were trying to get the processor working.”CS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCBIn Final Project, Pat did a better job ...“There was a vast improvement in terms of cooperation and involvement. What amazed the other teammates and I was that Pat wrote the cache controller and tested it all by himself which none of us knew that he was capable of.Why the change ?Pat’s Final Project reviews ...CS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCBPeer Reviews: ~20% of final gradeNext, evaluate the performance of the other members of your group (do not evaluate yourself). Express your evaluation as a percentage between 0% and 100%. A score of 100% indicates that the person met your expectations for a good group member. A score of less than 100% indicates that you feel that the group member did not fully live up to the "social contract" that comes along with enrolling in a team project course in EECS at Cal.CS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCB152: Semester Calendarwww-inst.eecs.berkeley.edu/~cs152/See class webpage for most up to date version!CS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCBWeek One: You are here.Lab due Tuesday.Download Lab 1, done individually. It is a refresher lab for MIPS assembly language programming. Use 125 or 119 Cory, or use RDF (see web page “Resources”)CS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCBWeek One: Preparing for team labsTAs: Udam Saini and Jue Sun.“A+ team” CS152 alumni. See web page for contact info.Lab 2, the first team lab, is up. On Friday, meet in your TAs in 125 Cory at your group’s section time. Decide on a group name during this meeting (or beforehand).CS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCBWeeks Two and Three: Lab 2 BeginsCS 152 L1: The MIPS ISA UC Regents Fall 2006 © UCBWeek Four/Five: Lab 2 Ends, Begin Lab 3UC Regents Fall 2006 © UCBCS 152 L1: The MIPS ISARecent history of CS 152 ...Failed projects: In Fall 04 and Spring 05, many groups didn’t get their final project CPU working (80% didn’t work in Fall 04, 50% didn’t work in Spring 05). In Fall 05, all groups got their final project working in hardware (some did not pass all tests).All projects successful: We want every group to get every CPU working.Our goal for Fall 06:UC Regents Fall 2006 © UCBCS 152 L1: The MIPS ISARecent history of CS 152 ...Flaky Teammates: Most semesters, at least
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