An Overview of FLEET CS 152 FLEET Brainchild of Ivan Sutherland Fleshed out in collaboration with Berkeley graduate students A one instruction clockless processor Alternatively an asynchronous transporttriggered VLIW machine Designed to take advantage of asynchronous circuits But first I d like to talk about Ancient bridges were made of stone Required arch and keystone design Steel Much stronger building material than stone Early Steel Bridges Arch and keystone not required Regardless early steel bridges were built as imitations of stone bridges Modern Steel Bridges Steel made suspension bridges possible Took a while for people to realize that new materials enabled new designs What does this have to do with Computer Architecture Synchronous circuits Single cycle pipelined superscalar Tomasulo etc Asynchronous circuits Early async processors imitated synchronous architectures FLEET is a first draft of what suspension bridges might look like Crash Course on Asynchronous Circuits KLA Kinetic Learning Activity IF predecessor successor THEN copy predecessor Muller C Element Majority gate with output looped back A two voter election with incumbent advantage in event of a tie majority gate C c M ab a 0 1 0 0 c b 1 c 1 Micropipelines Chain of Muller CElements Each element connects to an inverted input on predecessor noninverted on successor C C C C Micropipelines each stage of the control follows a very simple stage state rule C C IF predecessor successor THEN copy predecessor s state ELSE hold present state IES 89 C C Micropipelines IF predecessor successor THEN copy predecessor s state ELSE hold present state C C C C Micropipelines IF predecessor successor THEN copy predecessor s state ELSE hold present state Any disagreements propagate to the right C C C C Micropipelines IF predecessor successor THEN copy predecessor s state ELSE hold present state Any disagreements propagate to the right C C C C Micropipelines IF predecessor successor THEN copy predecessor s state ELSE hold present state Any disagreements propagate to the right C C C C Micropipelines IF predecessor successor THEN copy predecessor s state ELSE hold present state Any disagreements propagate to the right C C C C Micropipelines IF predecessor successor THEN copy predecessor s state ELSE hold present state Any disagreements propagate to the right System is stable when pipeline contains Zero or more agreeing stages Followed by zero or more disagreeing stages C C C C Micropipelines Transition signaling A transition on a stage s output will Acknowledge data from the previous segment Signal data ready to next segment C C Data C Ack C Ready Other Styles Exist Too many for this talk Advantages of Async Average not worst case timing no timing closure Early completion with some circuit styles Separates correctness from performance No clock tree Low power Better modularity Better EMI profile Extremely robust to variations Process Temperature Voltage Caltech MiniMIPS 250 foo dat 200 150 MIPS Designed 1995 1998 250 the performance of the best synchronous MIPS on the same fabrication process 100 Performance scaled automatically with voltage and temperature changes 50 0 1 1 5 2 2 5 3 voltage 3 5 4 4 5 5 Communication Matters Metal rod model of VLSI wires Communication is what matters so put the programmer in charge of it One instruction MOVE Mike Holenderski s Animation http research cs berkeley edu class fleet docs fleet animation swf 4 decode Instruction Memory PC rd rs rt imm registers ALU Data memory MIPS Pipeline vs FLEET SHIPs 1 Inboxes and Outboxes for Tokens Inboxes and Outboxes As an amendment to earlier memo AM10 formerly bare token inputs and outputs now have inboxes and outboxes Outbox Client Ship DataIn DataOut DataIn Switch Fabric OutBox DataOut InBox Ack Trigger Inbox Client Ship In the diagram below dashed lines indicate connections which always carry tokens while solid horizontal lines carry data in the case of data inboxes outboxes and tokens in the case of token inboxes outboxes Ack Instruction Instruction Inboxes and Outboxes Token inboxes and outboxes behave in a slightly different manner than data inboxes and outboxes The following large chart shows the 24 generalized instruction forms the four charts following it depict which instruction forms are Code Bags Unordered sets of instructions Lets us start fetching the next block of code as soon as the current block starts executing Unlike sequential instruction ISAs An instruction tells a box what action to take This action involves possibly copying or consuming a datum from its input and possibly sending that datum on its output The instruction may also specify whether or not the box must wait for a token on its input before performing this action and whether it should emit a token on its output to announce that the action has been completed Anatomy of a FLEET Instruction The field formerly can now hold only values and A is no longer valid its role has been subsumed by the other instruction fields A conceptual Fleet instruction format is shown below DataIn Source Address log 2 NUMSOURCES Ignore Copy Take 1 5 Triggered 1 Count log2 MAXMOVE Ack DataOut 1 1 Destination Address log 2 NUMDESTINATIONS Anatomy of a FLEET Instruction Note that the bits need not occur in this order Indeed the bits are likely to be coded more efficiently since the field has three possible values and not all combinations of and are valid The new fields include If set the box will wait for a token on its input and consume it Instruction Forms Triggered DataIn Ignore DataIn Ignore DataIn Copy DataIn Copy DataIn Take DataIn Take wait wait discard discard wait ack wait ack discard ack discard ack DataOut DataOut copy copy move or accept move or accept DataOut Ack DataOut Ack copy ack copy ack move ack or accept ack move ack or accept ack Not Triggered nop nop Ack Ack nop ack nop ack Synchronous SHIPs The fact that the switch fabric is asynchronous is fairly essential to FLEET However SHIPs can be internally synchronous Pauseable clocks are an attractive option More Information Website http research cs berkeley edu class fleet Graduate seminar meets in this room tomorrow 10am noon Project presentations are a week from tomorrow
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