9/22/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec7.1CS152Computer Architecture and EngineeringLecture 7Designing a Single Cycle DatapathSeptember 22, 2001John Kubiatowicz (http.cs.berkeley.edu/~kubitron)lecture slides: http://www-inst.eecs.berkeley.edu/~cs152/9/22/01 ©UCB Fall 2001CS152 /Kubiatowicz Lec7.2Outline of Today’s Lecture° Recap (5 minutes)° Finish on Floating Point° Design a processor: step-by-step° Requirements of the Instruction Set° Questions and Administrative Matters (5 minutes)° Components and Clocking° Assembling an Adequate Datapath° Break (5 minutes)° Controling the datapath9/22/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec7.3Review: DIVIDE HARDWARE Version 3° 32-bit Divisor reg, 32 -bit ALU, 64-bit Remainder reg, (0-bit Quotient reg)Remainder(Quotient)Divisor32-bit ALUWriteControl32 bits64 bitsShift Left“HI” “LO”° Multiplication and Division can use same hardware!9/22/01 ©UCB Fall 2001CS152 /Kubiatowicz Lec7.4Divide Algorithm Version 3 example (7 / 2)Remainder Divisor0000 0111 00100: 0000 1110 0010 ; Initial Shift1: 1110 1110 0010 ; Try to subtract2: 0000 1110 0010 ; Can’t: Add back3: 0001 1100 0010 ; Shift in 01: 1111 1100 0010 ; Try to subtract2: 0001 1100 0010 ; Can’t: Add back3: 0011 1000 0010 ; Shift in 01: 0001 1000 0010 ; Try to subtract2: 0001 1000 0010 ; Success!3: 0011 0001 0010 ; Shift in 11: 0001 0001 0010 ; Try to subtract2: 0001 0001 0010 ; Success!3: 0010 0011 0010 ; Shift in 1 E: 0001 0011 0010 ; Correct remainder9/22/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec7.5Non restoring versionRemainder Divisor0000 0111 00100: 0000 1110 0010 ; Initial Shift1: 1110 1110 0010 ; Try to subtract3: 1101 1100 0010 ; Negative: Shift in 01: 1111 1100 0010 ; Try to add (neg)3: 1111 1000 0010 ; Negative: Shift in 01: 0001 1000 0010 ; Try to Add3: 0011 0001 0010 ; Positive: Shift in 11: 0001 0001 0010 ; Try to subtract3: 0010 0011 0010 ; Positive: Shift in 1 E: 0001 0011 0010 ; Correct remainder Insight: (-Divisor * 2) + Divisor = Divisor9/22/01 ©UCB Fall 2001CS152 /Kubiatowicz Lec7.6Recall: What is in a number?° What can be represented in N bits?° Unsigned 0 to 2N-1° 2s Complement - 2N-1to 2N-1-1° 1s Complement -2N-1+1 to 2N-1-1° Excess M 2 -Mto 2 N -M -1• (E = e + M)° BCD 0 to 10N/4-1° But, what about?• very large numbers? 9,349,398,989,787,762,244,859,087,678• very small number? 0.0000000000000000000000045691• rationals 2/3• irrationals• transcendentals e, 29/22/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec7.7Review: Recall Scientific Notation6.02 x 10 1.673 x 1023-24exponentradix (base)Mantissadecimal pointSign, magnitudeSign, magnitudeIEEE F.P. ± 1.M x 2e - 127° Issues:• Arithmetic (+, -, *, / )• Representation, Normal form• Range and Precision• Rounding• Exceptions (e.g., divide by zero, overflow, underflow)• Errors• Properties ( negation, inversion, if A z B then A - B z 0 )9/22/01 ©UCB Fall 2001CS152 /Kubiatowicz Lec7.8Review from Prerequisties: Floating-Point ArithmeticRepresentation of floating point numbers in IEEE 754 standard:single precision18 23signexponent:excess 127binary integermantissa:sign + magnitude, normalizedbinary significand w/ hiddeninteger bit: 1.Mactual exponent ise = E - 127SEMN = (-1) 2 (1.M)SE-1270 < E < 2550 = 0 00000000 0 . . . 0 -1.5 = 1 01111111 10 . . . 0Magnitude of numbers that can be represented is in the range:2-126(1.0)to 2127(2 - 2-23)which is approximately:1.8 x 10-38to 3.40 x 10 38(integer comparison valid on IEEE Fl.Pt. numbers of same sign!)9/22/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec7.9Basic Addition Algorithm/Multiply issuesFor addition (or subtraction) this translates into the following steps:(1) compute Ye - Xe (getting ready to align binary point)(2) right shift Xm that many positions to form Xm 2(3) compute Xm 2 + Ymif representation demands normalization, then normalization step follows:(4) left shift result, decrement result exponent (e.g., 0.001xx…)right shift result, increment result exponent (e.g., 101.1xx…)continue until MSB of data is 1 (NOTE: Hidden bit in IEEE Standard)(5) for multiply, doubly biased exponent must be corrected:Xe = 7Ye = -3Excess 8extra subtraction step of the bias amount(6) if result is 0 mantissa, may need to zero exponent by special stepXe-YeXe-YeXe = 1111Ye = 010110100= 15= 520= 7 + 8= -3 + 84 + 8 + 89/22/01 ©UCB Fall 2001CS152 /Kubiatowicz Lec7.10Extra Bits for rounding"Floating Point numbers are like piles of sand; every time you move one you lose a little sand, but you pick up a little dirt."How many extra bits? IEEE: As if computed the result exactly and rounded.Addition:1.xxxxx 1.xxxxx 1.xxxxx+ 1.xxxxx 0.001xxxxx 0.01xxxxx1x.xxxxy 1.xxxxxyyy 1x.xxxxyyypost-normalization pre-normalization pre and post° Guard Digits: digits to the right of the first p digits of significand to guard against loss of digits – can later be shifted left into first P places during normalization.° Addition: carry-out shifted in° Subtraction: borrow digit and guard° Multiplication: carry and guard, Division requires guard9/22/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec7.11Rounding Digitsnormalized result, but some non-zero digits to the right of thesignificand --> the number should be roundedE.g., B = 10, p = 3:0 2 1.690 0 7.450 2 1.62= 1.6900 * 10= - .0745 * 10= 1.6155 * 102-bias2-bias2-bias-one round digit must be carried to the right of the guard digit so that after a normalizing left shift, the result can be rounded, accordingto the value of the round digitIEEE Standard:four rounding modes: round to nearest even (default)round towards plus infinityround towards minus infinityround towards 0round to nearest:round digit < B/2 then truncate> B/2 then round up (add 1 to ULP: unit in last place)= B/2 then round to nearest even digitit can be shown that this strategy minimizes the mean errorintroduced by rounding9/22/01 ©UCB Fall 2001CS152 /Kubiatowicz Lec7.12Sticky BitAdditional bit to the right of the round digit to better fine tune roundingd0 . d1 d2 d3 . . . dp-1 0 0 00 . 0 0 X . . . X X X SX X S+Sticky bit: set to 1 if any 1 bits fall offthe end of the round digitd0 . d1 d2 d3 . . . dp-1 0 0 00 . 0 0 X . . . X X X 0X X 0-d0 . d1 d2 d3 . . . dp-1 0 0 00 . 0 0 X . . . X X X
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