DOC PREVIEW
Berkeley COMPSCI 152 - Laboratory Exercise 2

This preview shows page 1-2 out of 7 pages.

Save
View full document
View full document
Premium Document
Do you want full access? Go Premium and unlock all 7 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 7 pages.
Access to all documents
Download any document
Ad free experience
Premium Document
Do you want full access? Go Premium and unlock all 7 pages.
Access to all documents
Download any document
Ad free experience

Unformatted text preview:

C152 Laboratory Exercise 2Professor: Krste AsanovicGSI: Henry CookDepartment of Electrical Engineering & Computer ScienceUniversity of California, BerkeleyFebruary 18, 20081 Introduction and goalsThe goal of this laboratory assignment is to allow you to conduct some simple memory hierarchyexperiments in the Simics simulation environment. Using the g-cache cache simulator module, youwill collect cache statistics and make some architectural recommendations based on the results.The lab has two sections, a directed portion and an open–ended portion. Everyone will do thedirected portion the same way, and grades will be assigned based on correctness. The open–endedportion will allow you to pursue more creative investigations, and your grade will be based on theeffort made to complete the task or the arguments you provide in support of your ideas.Students are encouraged to discuss solutions to the lab assignments with other students, butmust run through the directed portion of the lab by themselves and turn in their own lab report.For the open-ended portion of each lab, students can work individually or in groups of two orthree. Any open-ended lab assignment completed as a group should be written up and handed inseparately. Students are free to take part in different groups for different lab assignments.You are only required to do one of the open ended assignments. These assignments are generallystarting points or suggestions. Alternatively, you can propose and complete your own open endedproject as long as it is sufficiently rigorous. If you feel uncertain about the rigor of a proposal, feelfree to consult the TA or professor.1.1 Tools and conventionsThis lab assumes you have completed the first laboratory assignment. While we will re-includeall the files used for both labs in this lab’s distribution bundle for your convenience, there will bepoints where you can save time by reusing checkpoints and such created in the first lab.Furthermore, we will assume that you remember all the commands used in the first lab forcontrolling Simics simulation. If you feel any confusion about these points, feel free to consult thefirst lab guide or the Simics User Guide.Several new tools will be introduced in this lab, mainly having to do with the g-cache module.We will also introduce a new mode of Simics operation (-stall). For a more thorough explanationof these items, you can refer to the Simics User Guide chapter 18.11.2 Graded ItemsYou will turn a hard copy of your results to the professor or TA. Please label each section of theresults clearly. The following items need to be turned in for evaluation:1. Problem 2.2: simple cache statistics for each benchmark and answers2. Problem 2.3: suggested working sets and evidence3. Problem 2.4: statistics and answers4. Problem 2.5: complex cache statistics and answers5. Problem 3.1/3.2/3.3/3.4 modifications and evaluations (include source code if required)2 Directed Portion2.1 General methodologyAt its core, the Simics software is an instruction set architecture simulator, not a machine perfor-mance simulator. While Simics presents an interface to the OS and programs running within itthat makes the target machine appear to be a normal machine, in actuality many of the simulatedmachine’s functions are idealized far beyond the capabilities of a real machine. For example, innormal execution mode, main memory accesses in Simics appear to take zero cycles.However, it is possible to attach a cache simulator module to Simics and use it to gauge aprogram’s cache performance or the effectiveness of a particular cache hierarchy. The cache simula-tion module included with Simics is called g-cache. These modules can be linked into hierarchies,connected to multiple processors and have a variety of adjustable parameters. g-caches are con-figured and attached to the memory hierarchy by means of simple Simics scripts containing pythoncommands (the @ prefix tells Simics to interpret a statement as python).One of these g-cache parameters is the delay accrued by a memory request as it passes downthrough each level of the hierarchy to the simulated memory interface. By running Simics in -stallmode, users can force the delayed execution of instructions according to whether or not the data theinstructions require is contained in caches or memory. Simultaneously, the cache modules recordstatistics about the memory requests which have accessed them. -stall mode is a more detailedmode of simulation, and therefore noticeably slows down the operating speed of the target machine.A further methodological detail is that when the caches are first attached to the simulation,they are empty. Any statistics recorded from them initially will only reflect the compulsory missesencountered as they fill up. For this reason, it is necessary to ‘warm’ the caches by running theintended benchmark for millions of instructions before the true cache performance statistics can becollected.Thus, the general methodology of this lab takes the following form:1. Run the simulation at full speed to get the file system loaded, the benchmarks set up, etc.2. Checkpoint the simulation3. Restart simulation in -stall mode24. Load the caches using a .simics script5. Warm the caches by executing benchmark code6. Pause or breakpoint the simulation7. Reset all the caches’ statistics8. Continue to run the benchmark and collect real cache dataData from the cache modules can take several forms. <cache name>.info reports the con-figuration of the cache, <cache name>.status displays the current value of every cache line,<cache name>.statistics reports cache performance statistics, and <cache name>.add-profileradds a profiler module which tracks cache misses on a per instruction or address basis.You can use any of the ilinux{1,2,3}.eecs.berkeley.edu instructional servers to completethis lab assignment. Do not wait until the night before the assignment is due, because you will faceresource contention that may significantly increase the time it takes to complete the assignment.2.2 Collecting statistics from a simple cacheYou should untar the file benchmarks-1.tar distributed with this Lab (tar -xvf benchmarks-1.tar)and make sure the three binary and three input files are available in your simics-workspace direc-tory. The binary files for this lab are the same as the ones used in Lab 1 (bzip2_sparc, mcf_sparc,soplex_sparc).Start Simics, using either the targets/sunfire/bagel-common.simics script or a


View Full Document

Berkeley COMPSCI 152 - Laboratory Exercise 2

Documents in this Course
Quiz 5

Quiz 5

9 pages

Memory

Memory

29 pages

Quiz 5

Quiz 5

15 pages

Memory

Memory

29 pages

Memory

Memory

35 pages

Memory

Memory

15 pages

Quiz

Quiz

6 pages

Midterm 1

Midterm 1

20 pages

Quiz

Quiz

12 pages

Memory

Memory

33 pages

Quiz

Quiz

6 pages

Homework

Homework

19 pages

Quiz

Quiz

5 pages

Memory

Memory

15 pages

Load more
Download Laboratory Exercise 2
Our administrator received your request to download this document. We will send you the file to your email shortly.
Loading Unlocking...
Login

Join to view Laboratory Exercise 2 and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view Laboratory Exercise 2 2 2 and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?