CS 152 Computer Architecture andEngineering Lecture 1 - IntroductionKrste AsanovicElectrical Engineering and Computer SciencesUniversity of California at Berkeleyhttp://www.eecs.be rkeley.edu /~krstehttp://inst.eecs.b erkeley.ed u/~cs1521/22/2008 CS152-Spring!082Computing Devices Then…EDSAC, University of Cambridge, UK, 19491/22/2008 CS152-Spring!083Computing Devices NowRobotsSupercomputersAutomobilesLaptopsSet-topboxesGamesSmartphonesServersMediaPlayersSensor NetsRoutersCameras1/22/2008 CS152-Spring!084What is Computer Architecture?ApplicationPhysicsGap too large tobridge in one step(but there are exceptions,e.g. magnetic compass)In its broadest definition, computer architecture is thedesign of the abstraction layers that allow us to implementinformation processing applications efficiently usingavailable manufacturing technologies.1/22/2008 CS152-Spring!085Abstraction Layers in Modern SystemsAlgorithmGates/Register-Transfer Level (RTL)ApplicationInstruction Set Architecture (ISA)Operating System/Virtual MachinesMicroarchitectureDevicesProgramming LanguageCircuitsPhysicsOriginaldomain ofthe computerarchitect(‘50s-’80s)Domain ofrecentcomputerarchitecture(‘90s)1/22/2008 CS152-Spring!0861101001000100001978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002 2004 2006Performance (vs. VAX-11/780) 25%/year52%/year??%/yearUniprocessor Performance• VAX : 25%/year 1978 to 1986• RISC + x86: 52%/year 1986 to 2002• RISC + x86: ??%/year 2002 to presentFrom Hennessy and Patterson, ComputerArchitecture: A Quantitative Approach, 4thedition, October, 2006What happened????1/22/2008 CS152-Spring!087The End of the Uniprocessor EraSingle biggest change in the historyof computing systems1/22/2008 CS152-Spring!088• Old Conventional Wisdom: Power is free, Transistors expensive• New Conventional Wisdom: “Power wall” Power expensive, Transistors free(Can put more on chip than can afford to turn on)• Old CW: Sufficient increasing Instruction-Level Parallelism via compilers,innovation (pipelining, superscalar, out-of-order, speculation, VLIW, …)• New CW: “ILP wall” law of diminishing returns on more HW for ILP• Old CW: Multiplies are slow, Memory access is fast• New CW: “Memory wall” Memory slow, multiplies fast(200 clock cycles to DRAM memory, 4 clocks for multiply)• Old CW: Uniprocessor performance 2X / 1.5 yrs• New CW: Power Wall + ILP Wall + Memory Wall = Brick Wall– Uniprocessor performance now 2X / 5(?) yrs! Sea change in chip design: multiple “cores”(2X processors per chip / ~ 2 years)» More, simpler processors are more power efficientConventional Wisdom in Computer Architecture1/22/2008 CS152-Spring!089Sea Change in Chip Design• Intel 4004 (1971): 4-bit processor,2312 transistors, 0.4 MHz,10 micron PMOS, 11 mm2 chip• Processor is the new transistor?• RISC II (1983): 32-bit, 5 stagepipeline, 40,760 transistors, 3 MHz,3 micron NMOS, 60 mm2 chip• 125 mm2 chip, 0.065 micron CMOS= 2312 RISC II+FPU+Icache+Dcache– RISC II shrinks to ~ 0.02 mm2 at 65 nm– Caches via DRAM or 1 transistor SRAM?1/22/2008 CS152-Spring!0810Déjà vu all over again?• Multiprocessors imminent in 1970s, ‘80s, ‘90s, …• “… today’s processors … are nearing an impasse as technologiesapproach the speed of light..”David Mitchell, The Transputer: The Time Is Now (1989)• Transputer was premature! Custom multiprocessors tried to beat uniprocessors! Procrastination rewarded: 2X seq. perf. / 1.5 years• “We are dedicating all of our future product development tomulticore designs. … This is a sea change in computing”Paul Otellini, President, Intel (2004)• Difference is all microprocessor companies have switched tomultiprocessors (AMD, Intel, IBM, Sun; all new Apples 2+ CPUs)! Procrastination penalized: 2X sequential perf. / 5 yrs! Biggest programming challenge: from 1 to 2 CPUs1/22/2008 CS152-Spring!0811Problems with Sea Change• Algorithms, Programming Languages, Compilers,Operating Systems, Architectures, Libraries, … notready to supply Thread-Level Parallelism or Data-LevelParallelism for 1000 CPUs / chip,• Architectures not ready for 1000 CPUs / chip– Unlike Instruction-Level Parallelism, cannot be solved by computerarchitects and compiler writers alone, but also cannot be solved withoutparticipation of architects• Need a reworking of all the abstraction layers in thecomputing system stack1/22/2008 CS152-Spring!0812Abstraction Layers in Modern SystemsAlgorithmGates/Register-Transfer Level (RTL)ApplicationInstruction Set Architecture (ISA)Operating System/Virtual MachinesMicroarchitectureDevicesProgramming LanguageCircuitsPhysicsOriginaldomain ofthe computerarchitect(‘50s-’80s)Domain ofrecentcomputerarchitecture(‘90s)Reliability,power, …Parallelcomputing,security, …Reinvigoration ofcomputer architecture,mid-2000s onward.1/22/2008 CS152-Spring!0813The New CS152• New CS152 focuses on interaction of software andhardware– more architecture and less digital engineering.• No FPGA design component– We are preparing a separate FPGA design lab class for Fall 2008,where you can try building some of the architectural ideas we’ll explorethis semester (100% digital engineering)• Much of the material you’ll learn this term was previouslyin CS252– Some of the current CS61C, I first saw in CS252 nearly 20 years ago!– Maybe every 10 years, shift CS252->CS152->CS61C?• Class contains labs based on various different machinedesigns– Experiment with how architectural mechanisms work in practice on realsoftware.1/22/2008 CS152-Spring!0814CS 152 Course FocusUnderstanding the design techniques, machine structures,technology factors, evaluation methods that will determinethe form of computers in 21st CenturyTechnologyProgrammingLanguagesOperatingSystemsHistoryApplicationsInterface Design(ISA)Measurement &EvaluationParallelismComputer Architecture:• Organization• Hardware/Software BoundaryCompilers1/22/2008 CS152-Spring!0815The New CS152 Executive SummaryThe processor yourpredecessors built inCS152What you’llunderstand andexperiment with inthe new CS152Plus, the technologybehind chip-scalemultiprocessors(CMPs)1/22/2008 CS152-Spring!0816CS152 AdministriviaInstructor: Prof. Krste AsanovicOffice: 645 Soda Hall, kr ste@eecsOffice Hours: M 1-3PM (email to confirm), 645 Soda HallT. A.: Henry Cook, hcook@ee csOffice Hours: TBDLectures: Tu/Th, 2:00-3:30PM, 320 SodaSection: W 10:00-11:00AM, 2 EvansText: Computer
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