DOC PREVIEW
Berkeley COMPSCI 152 - Lecture 3 - From CISC to RISC

This preview shows page 1-2-3-22-23-24-44-45-46 out of 46 pages.

Save
View full document
View full document
Premium Document
Do you want full access? Go Premium and unlock all 46 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 46 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 46 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 46 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 46 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 46 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 46 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 46 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 46 pages.
Access to all documents
Download any document
Ad free experience
Premium Document
Do you want full access? Go Premium and unlock all 46 pages.
Access to all documents
Download any document
Ad free experience

Unformatted text preview:

January 26, 2010 CS152, Spring 2010 CS 152 Computer Architecture and Engineering Lecture 3 - From CISC to RISC Krste Asanovic Electrical Engineering and Computer Sciences University of California at Berkeley http://www.eecs.berkeley.edu/~krste!http://inst.eecs.berkeley.edu/~cs152!January 26, 2010 CS152, Spring 2010 Last Time in Lecture 2 • ISA is the hardware/software interface – Defines set of programmer visible state – Defines instruction format (bit encoding) and instruction semantics – Examples: MIPS, x86, IBM 360, JVM • Many possible implementations of one ISA – 360 implementations: model 30 (c. 1964), z10 (c. 2008) – x86 implementations: 8086 (c. 1978), 80186, 286, 386, 486, Pentium, Pentium Pro, Pentium-4 (c. 2000), Core 2 Duo, Nehalem, AMD Athlon, Transmeta Crusoe, SoftPC – MIPS implementations: R2000, R4000, R10000, R18K, … – JVM: HotSpot, PicoJava, ARM Jazelle, ... 2January 26, 2010 CS152, Spring 2010 3 Last Time in Lecture 2 • When microcode appeared, different technologies for: – Logic -> Vacuum Tubes – Main Memory -> Magnetic cores – Read-Only Memory -> Diode matrix, punched metal cards,+++ • Logic was expensive, and ROM much faster than RAM • Microcoding was a straightforward methodical way to implement machines with low logic gate count • Microcode made it easy to add complex instructionsJanuary 26, 2010 CS152, Spring 2010 “Iron Law” of Processor Performance 4 Time = Instructions Cycles Time Program Program * Instruction * Cycle – Instructions per program depends on source code, compiler technology, and ISA – Cycles per instructions (CPI) depends upon the ISA and the microarchitecture – Time per cycle depends upon the microarchitecture and the base technologyJanuary 26, 2010 CS152, Spring 2010 Inst 3 CPI for Microcoded Machine 5 7 cycles Inst 1 Inst 2 5 cycles 10 cycles Total clock cycles = 7+5+10 = 22 Total instructions = 3 CPI = 22/3 = 7.33 CPI is always an average over a large number of instructions TimeJanuary 26, 2010 CS152, Spring 2010 6 When to add a new complex instruction? • Does it improve performance? • How much does it cost?January 26, 2010 CS152, Spring 2010 First Microprocessor Intel 4004, 1971 • 4-bit accumulator architecture • 8µm pMOS • 2,300 transistors • 3 x 4 mm2 • 750kHz clock • 8-16 cycles/inst. 7 Made possible by new integrated circuit technologyJanuary 26, 2010 CS152, Spring 2010 Microprocessors in the Seventies Initial target was embedded control • First micro, 4-bit 4004 from Intel, designed for a desktop printing calculator Constrained by what could fit on single chip • Single accumulator architectures similar to earliest computers • Hardwired state machine control 8-bit micros (8085, 6800, 6502) used in hobbyist personal computers • Micral, Altair, TRS-80, Apple-II • Usually had 16-bit address space (up to 64KB directly addressable) Often came with simple BASIC language interpreter built into ROM or loaded from cassette tape. 8January 26, 2010 CS152, Spring 2010 VisiCalc – the first “killer” app for micros • Microprocessors had little impact on conventional computer market until VisiCalc spreadsheet for Apple-II • Apple-II used Mostek 6502 microprocessor running at 1MHz ` 9 [ Personal Computing Ad, 1979 ] Floppy disk drives were originally invented by IBM as a way of shipping IBM 360 microcode patches to customers!January 26, 2010 CS152, Spring 2010 DRAM in the Seventies Dramatic progress in MOSFET memory technology 1970, Intel introduces first DRAM, 1Kbit 1103 1979, Fujitsu introduces 64Kbit DRAM => By mid-Seventies, obvious that PCs would soon have >64KBytes physical memory 10January 26, 2010 CS152, Spring 2010 Microprocessor Evolution Rapid progress in size and speed through 70s fueled by advances in MOSFET technology and expanding markets Intel i432 – Most ambitious seventies’ micro; started in 1975 - released 1981 – 32-bit capability-based object-oriented architecture – Instructions variable number of bits long – Severe performance, complexity, and usability problems Motorola 68000 (1979, 8MHz, 68,000 transistors) – Heavily microcoded (and nanocoded) – 32-bit general purpose register architecture (24 address pins) – 8 address registers, 8 data registers Intel 8086 (1978, 8MHz, 29,000 transistors) – “Stopgap” 16-bit processor, architected in 10 weeks – Extended accumulator architecture, assembly-compatible with 8080 – 20-bit addressing through segmented addressing scheme 11January 26, 2010 CS152, Spring 2010 IBM PC, 1981 Hardware • Team from IBM building PC prototypes in 1979 • Motorola 68000 chosen initially, but 68000 was late • IBM builds “stopgap” prototypes using 8088 boards from Display Writer word processor • 8088 is 8-bit bus version of 8086 => allows cheaper system • Estimated sales of 250,000 • 100,000,000s sold Software • Microsoft negotiates to provide OS for IBM. Later buys and modifies QDOS from Seattle Computer Products. Open System • Standard processor, Intel 8088 • Standard interfaces • Standard OS, MS-DOS • IBM permits cloning and third-party software 12January 26, 2010 CS152, Spring 2010 13 [ Personal Computing Ad, 11/81]January 26, 2010 CS152, Spring 2010 Analyzing Microcoded Machines • John Cocke and group at IBM – Working on a simple pipelined processor, 801, and advanced compilers inside IBM – Ported experimental PL.8 compiler to IBM 370, and only used simple register-register and load/store instructions similar to 801 – Code ran faster than other existing compilers that used all 370 instructions! (up to 6MIPS whereas 2MIPS considered good before) • Emer, Clark, at DEC – Measured VAX-11/780 using external hardware – Found it was actually a 0.5MIPS machine, although usually assumed to be a 1MIPS machine – Found 20% of VAX instructions responsible for 60% of microcode, but only account for 0.2% of execution • VAX8800 – Control Store: 16K*147b RAM, Unified Cache: 64K*8b RAM – 4.5x more microstore RAM than cache RAM! 14January 26, 2010 CS152, Spring 2010 IC Technology Changes Tradeoffs • Logic, RAM, ROM all implemented using MOS transistors • Semiconductor RAM ~same speed as ROM 15January 26,


View Full Document

Berkeley COMPSCI 152 - Lecture 3 - From CISC to RISC

Documents in this Course
Quiz 5

Quiz 5

9 pages

Memory

Memory

29 pages

Quiz 5

Quiz 5

15 pages

Memory

Memory

29 pages

Memory

Memory

35 pages

Memory

Memory

15 pages

Quiz

Quiz

6 pages

Midterm 1

Midterm 1

20 pages

Quiz

Quiz

12 pages

Memory

Memory

33 pages

Quiz

Quiz

6 pages

Homework

Homework

19 pages

Quiz

Quiz

5 pages

Memory

Memory

15 pages

Load more
Download Lecture 3 - From CISC to RISC
Our administrator received your request to download this document. We will send you the file to your email shortly.
Loading Unlocking...
Login

Join to view Lecture 3 - From CISC to RISC and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view Lecture 3 - From CISC to RISC 2 2 and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?