CS 152 Computer Architecture and Engineering Lecture 10 Multicycle Controller Design (Continued)Partitioning the CPI=1 DatapathRecap: Example Multicycle DatapathRecap: FSM specificationSequencer-based control unit: Statemachine ++Recap: Micro-controller DesignRecap: Specific Sequencer from last lectureRecap: Microprogram Control SpecificationRecap: Overview of ControlThe Big Picture: Where are We Now?Microprogramming (Maurice Wilkes)“Macroinstruction” InterpretationVariations on MicroprogrammingExtreme HorizontalMore Vertical FormatHybrid ControlVax MicroinstructionsHorizontal vs. Vertical MicroprogrammingAdministrationHow Effectively are we utilizing our hardware?“Princeton” OrganizationToday: Alternative datapath (book)New Finite State Machine (FSM) SpecFinite State Machine (FSM) SpecDesigning a Microinstruction Set1&2) Start with list of control signals, grouped into fieldsStart with list of control signals, cont’d3) Microinstruction Format: unencoded vs. encoded fields4) Legend of Fields and Symbolic NamesQuick check: what do these fieldnames mean?Alternative datapath (book): Multiple Cycle DatapathMicroprogram it yourself!Slide 33Legacy Software and MicroprogrammingMicroprogramming Pros and ConsAn Alternative MultiCycle DataPathWhat about a 2-Bus Microarchitecture (datapath)?LoadSummarySummary: Microprogramming one inspiration for RISC10/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.1CS 152 Computer Architecture and EngineeringLecture 10Multicycle Controller Design (Continued) October 3, 2001John Kubiatowicz (http.cs.berkeley.edu/~kubitron)lecture slides: http://www-inst.eecs.berkeley.edu/~cs152/10/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.2Partitioning the CPI=1 Datapath°Add registers between smallest steps°Place enables on all registersPCNext PCOperandFetchExecReg. FileMemAccessDataMemInstructionFetchResult StoreALUctrRegDstALUSrcExtOpMemWrnPC_selRegWrMemWrMemRdEqual10/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.3Recap: Example Multicycle Datapath°Critical Path ?PCNext PCOperandFetchInstructionFetchnPC_selIRRegFileExtALUReg. FileMemAccessDataMemResult StoreRegDstRegWrMemWrMemRdSMMemToRegEqualALUctrALUSrcExtOpABE10/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.4Recap: FSM specificationIR <= MEM[PC]R-typeA <= R[rs]B <= R[rt]S <= A fun BR[rd] <= SPC <= PC + 4S <= A or ZXR[rt] <= SPC <= PC + 4ORiS <= A + SXR[rt] <= MPC <= PC + 4M <= MEM[S]LWS <= A + SXMEM[S] <= BPC <= PC + 4BEQPC <= Next(PC)SW“instruction fetch”“decode”000000010100010101100111100010011010001110111100ExecuteMemoryWrite-back10/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.5Sequencer-based control unit: Statemachine ++OpcodeState RegInputsOutputsControl LogicMulticycleDatapathTypes of “branching”• Set state to 0• Dispatch (state 1)• Use incremented state number1AdderAddress Select Logic10/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.6Recap: Micro-controller Design°The state digrams that arise define the controller for an instruction set processor are highly structured°Use this structure to construct a simple “microsequencer” •Each state in previous diagram becomes a “microinstruction”•Microinstructions often taken sequentially°Control reduces to programming this devicesequencercontroldatapath controlmicro-PCsequencermicroinstruction ()10/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.7Recap: Specific Sequencer from last lecture°Sequencer-based control unit from last lecture•Called “microPC” or “µPC” vs. state registerControl Value Effect 00 Next µaddress = 0 01 Next µaddress = dispatch ROM 10 Next µaddress = µaddress + 1ROM: OpcodemicroPC1µAddressSelectLogicAdderROMMux0012R-type 000000 0100BEQ 000100 0011ori 001101 0110LW 100011 1000SW 101011 101110/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.8Recap: Microprogram Control Specification0000 ? inc 10001 0 load0001 1 inc0010 x zero 1 10011 x zero 1 00100 x inc 0 1 fun 10101 x zero 1 0 0 1 10110 x inc 0 0 or 10111 x zero 1 0 0 1 01000 x inc 1 0 add 11001 x inc 1 0 11010 x zero 1 0 1 1 01011 x inc 1 0 add 11100 x zero 1 0 0 1 µPC Taken Next IR PC Ops Exec Mem Write-Backen sel A B Ex Sr ALU S R W M M-R Wr DstR:ORi:LW:SW:BEQ10/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.9Recap: Overview of Control°Control may be designed using one of several initial representations. The choice of sequence control, and how logic is represented, can then be determined independently; the control can then be implemented with one of several methods using a structured logic technique.Initial Representation Finite State Diagram MicroprogramSequencing Control Explicit Next State Microprogram counter Function + Dispatch ROMs Logic Representation Logic Equations Truth TablesImplementation PLA ROM Technique“hardwired control” “microprogrammed control”10/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.10The Big Picture: Where are We Now? °The Five Classic Components of a Computer°Today’s Topics: •Microprogramed control•Administrivia•Microprogram it yourself•ExceptionsControlDatapathMemoryProcessorInputOutput10/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.11Microprogramming (Maurice Wilkes)°Control is the hard part of processor design° Datapath is fairly regular and well-organized° Memory is highly regular° Control is irregular and globalMicroprogramming:-- A Particular Strategy for Implementing the Control Unit of a processor by "programming" at the level of register transfer operationsMicroarchitecture:-- Logical structure and functional capabilities of the hardware as seen by the microprogrammerHistorical Note:IBM 360 Series first to distinguish between architecture & organizationSame instruction set across wide range of implementations, each with different cost/performance10/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.12“Macroinstruction” InterpretationMainMemoryexecutionunitcontrolmemoryCPUADDSUBANDDATA...User program plus Datathis can change!AND microsequencee.g., Fetch Calc Operand Addr Fetch Operand(s) Calculate Save Answer(s)one of these ismapped into oneof these10/03/01 ©UCB Fall 2001CS152 / Kubiatowicz Lec10.13Variations on Microprogramming° “Horizontal” Microcode– control field for each control point in the machine° “Vertical” Microcode– compact microinstruction format for each class of microoperation
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