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Berkeley ELENG 141 - Lecture 14 Wires

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EE1411EECS1411Lecture #14EE141EE141--Fall 2009Fall 2009Digital Integrated Digital Integrated CircuitsCircuitsLecture 14Lecture 14WiresWiresEE1412EECS1412Lecture #14AnnouncementsAnnouncements Homework #6 due this Thurs. Homework #7 out this Thurs. Project #1 out Oct. 22rd Find a partner Thurs. lecture will be taped ahead tomorrow (10-14) 10:30am-12pm, 540A CoryEE1413EECS1413Lecture #14WiresWiresEE1414EECS1414Lecture #14The WireThe WirePhysicalSchematicEE1415EECS1415Lecture #14Wire ModelsWire ModelsEE1416EECS1416Lecture #14Impact of Interconnect Impact of Interconnect ParasiticsParasitics Interconnect and its parasitics can affect all of the metrics we care about Cost, reliability, performance, power consumption Parasitics associated with interconnect: Capacitance Resistance InductanceEE1417EECS1417Lecture #14INTERCONNECTINTERCONNECTEE1418EECS1418Lecture #14Capacitance: The Parallel Plate ModelCapacitance: The Parallel Plate ModelDie le ctricSubstrateLWHtdiElectrical-field linesCu rre nt flowWLtcdidiintε=EE1419EECS1419Lecture #14PermittivityPermittivityEE14110EECS14110Lecture #14Fringing CapacitanceFringing CapacitanceW - H/2H+(a)(b)EE14111EECS14111Lecture #14Fringing versus Parallel PlateFringing versus Parallel Plate(from [Bakoglu89])EE14112EECS14112Lecture #14InterwireInterwireCapacitanceCapacitancefringing parallelEE14113EECS14113Lecture #14Coupling Capacitance and DelayCoupling Capacitance and DelayEE14114EECS14114Lecture #14Coupling Capacitance and DelayCoupling Capacitance and DelayEE14115EECS14115Lecture #14Coupling Capacitance and DelayCoupling Capacitance and DelayEE14116EECS14116Lecture #14Impact of Impact of InterwireInterwireCapacitanceCapacitance(from [Bakoglu89])EE14117EECS14117Lecture #14Wiring Capacitances (0.25 Wiring Capacitances (0.25 µµm CMOS)m CMOS)EE14118EECS14118Lecture #14Wiring CapacitancesWiring CapacitancesEE14119EECS14119Lecture #14INTERCONNECTINTERCONNECTEE14120EECS14120Lecture #14Wire Resistance Wire Resistance WLHR = ρH WLSheet ResistanceRoR1R2EE14121EECS14121Lecture #14Dealing with Resistance Dealing with Resistance  Better materials: More layers:EE14122EECS14122Lecture #14Example NumbersExample NumbersEE14123EECS14123Lecture #14InterconnectInterconnectModelingModelingEE14124EECS14124Lecture #14The Distributed RCThe Distributed RC--linelineDriverReceiverdxr dxc dxr dxc dx• Analysis method:• Break the wire up into segments of length dx• Each segment has resistance (r dx) and capacitance (c dx)EE14125EECS14125Lecture #14The Distributed RCThe Distributed RC--lineline22VVrctx∂∂=∂∂22Lrcτ=()()11ii iiCVV VVVIcLtrL−+−−−∂=∆ =∂∆EE14126EECS14126Lecture #14Wire ModelWire ModelModel the wire with N equal-length segments:For large values of N:EE14127EECS14127Lecture #14RCRC--ModelsModelsEE14128EECS14128Lecture #14Wire Delay ExampleWire Delay ExampleEE14129EECS14129Lecture #14Next LectureNext Lecture SRAM Circuit


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Berkeley ELENG 141 - Lecture 14 Wires

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