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Berkeley ELENG 141 - MOS Transistor Model and VTC

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1EE141 Spring 2003Discussion 2MOS Transistor Model and VTCLink Your SPICE Model Correctly.lib '/home/aa/grad/huifangq/g25b.mod' TT• You'll notice that there are four corners, TT, FF, SS, FS, SF. These represent the different variation extremes we can expect due to process variations. For example, TT stands for NMOS: typical, PMOS: typical. FS stands for NMOS: fast, PMOS: slow etc.• Our homework sets will typically use the TT model.• For Hw2 problem 4, add the following line in your spice deck, instead of the link to the g25b.mod ahead:.MODEL nmos NMOS VTO=0.6 GAMMA=0.5 PHI=0.6 KP=20E-6 LAMBDA=0.05.MODEL pmos PMOS VTO=-0.6 GAMMA=0.5 PHI=0.6 KP=7E-6 LAMBDA=0.1(Use micron as the unit of W and L for transistors in problem 4!)2Some Issues Related to Lab2• Good that most people in the lab got through with no problem. Keep on your good job!• Max is frozen sometime – ‘Max &’ doesn’t really execute Max parallel as ‘Emacs &’ does– Open a second SSH window for all other operations like copying and checking email. Do not disturb Max when it’s working.• Some times the layer selection and wire drawing becomes weird in Max. Check to see if there’s some layers disabled there — the layer name turns dark after you click on it, which means that it’s disabled.Typical Assumptions in Problem Set• In digital design problems, if not specified otherwise, you can assume the following:– Bulk of PMOS is connected to Vdd, while bulk of NMOS is grounded. – When VSBof a device is not 0, you’ll need to take the body effect on Vth into consideration during circuit analysis.– The object of study is short channel device when the Vdsat data is given.– You can always use .MODEL command to simulate your circuits with certain process parameters, without sticking to the g25.modmodel.3Typical Problems in Hw2 — Digital Vs. Analog• It’s interesting to view some digital problems from a analog perspective.Typical Problems in Hw2 — Digital Vs. Analog• It’s interesting to view some digital problems from a analog perspective. – The small signal model used in analog analysis would help you inunderstanding the transient behavior of circuits better. E.g. the switching gain of an inverter.– It may provide more accurate results than the digital large signal analysis• However in this class it may be more important to develop a digital mind set in circuit analysis.– Digital focus on different metrics of circuit than analog: the steady state value of VM, VOH, VOL; the delay and power. – Digital always applies large signal analysis at fixed operation point.4Typical Problems in Hw2 — Saturation Vs. Vel. Saturation• A long channel device operates in either linear or saturation region (quadratic Id equation applied).• A short channel devices can operate in either linear, saturation or vel. saturation region. (Fig 3-24 @ Pg. 102)– The difference is that both saturation happen when Vds > min(Vgt, Vdsat),– But in saturation min(Vgt, Vdsat) = Vgt, – In vel. saturation min(Vgt, Vdsat) = Vdsat.Typical Problems in Hw2 — Noise Margin Calculation• Definition on textbook Pg. 21 NMH= VOH–VIHNML= VIL–VOL• However NM calculation is usually simplified in hand analysis:– When the switch transition is fast, the gain is approximated to be close to infinite, then VIH ≈ VM ≈ VIL. This usually happens when the pull-up and pull-down devices are both strong enough.– When VOH and VOL are still close to Vdd and ground (not too far away), they can be computed assuming Vin = 0 and Vdd respectively. — In the strict sense VOH is the output voltage when Vin = VOL, and VOLis the output voltage when Vin = VOH.5Typical Problems in Hw2 — Verhmi Voltage• For NMOS, 2фF = -0.6vFor PMOS, 2фF = 0.6vVBPVBNSafer but


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Berkeley ELENG 141 - MOS Transistor Model and VTC

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