EE1411EE141EE141--Spring 2008Spring 2008Digital Integrated Digital Integrated CircuitsCircuitsCircuitsCircuitsLecture 3Lecture 3EE141EECS1411Lecture #3Transistor Basics and Transistor Basics and CMOS InverterCMOS InverterAdministrativiaAdministrativia Enrollment issues resolvedDiscussions start this week (Today)Discussions start this week (Today) TA office hours will be held in 353 Cory Labs start next week Everyone should have an EECS instructional account Please see Loretta Lutcher in 253 Cory to get EE141EECS1412Lecture #3ygcard-key access to the lab Homework #1 is due this Friday Homework #2 to be posted on FridayEE1412Class MaterialClass Material Last lecture Basic metrics for IC design Today’s lecture Transistor basics Brief introduction to CMOS inverter operation (intro to Chapter 3)EE141EECS1413Lecture #3operation (intro to Chapter 3) Reading (2.1-2.2, 3.3.1-3.3.2)Review: ReliabilityReview: ReliabilityEE141EECS1414Lecture #34EE1413Performance: Delay DefinitionsPerformance: Delay DefinitionsVinVouttpHLtpLHt90%50%EE141EECS1415Lecture #3tftrt10%50%Fanout of Four (FO4) DelayFanout of Four (FO4) Delay Want a way to characterize the delay of a circuit (roughly) independent of technology Most common metric: Delay of an inverter driving four copies of itself (tFO4)EE141EECS1416Lecture #3tFO4EE1414A FirstA First--Order RC NetworkOrder RC NetworkRvoutvinCRtp= ln (2) τ = 0.69 RCEE141EECS1417Lecture #3Important model – matches delay of an inverterPower DissipationPower DissipationInstantaneous power: pp(t) = v(t)i(t) = Vsupplyi(t)Peak power: Ppeak= VsupplyipeakA EE141EECS1418Lecture #3Average power: ()∫∫++==TttTttsupplysupplyavedttiTVdttpTP )(1EE1415“Power“Power--Delay” and EnergyDelay” and Energy--DelayDelay Want low power and low delay, so how about optimizing the product of the two?Sll d “PDl P d t”So-called “Power-Delay Product” Power·Delay is by definition Energy Optimizing this pushes you to go as slow as possibleAlternative gate metric:EnergyDelay ProductEE141EECS1419Lecture #3Alternative gate metric: Energy-Delay Product EDP = (Pav·tp)·tp= E·tpEnergy in CMOSEnergy in CMOSvoutRVDDvinCL The voltage on CLeventually settles to VDD Thus, charge stored on the capacitor is CLVDDCLEE141EECS14110Lecture #3,g pLDD This charge has to flow out of the power supply So, energy is just Q·VDD=(CLVDD)·VDDEE1416Energy Energy –– Where Does It Go? Where Does It Go? voutRvinCL() ()∫∫∫====→DDVDDLoutLDDTTDDDDDDVCdvCVdttiVdttPE210EE141EECS14111Lecture #3∫∫∫000() ()∫∫∫====DDVDDLoutoutLTTLoutCCVCdvvCdttivdttPE020021Transistor BasicsTransistor BasicsEE141EECS14112Lecture #3EE1417What is a Transistor?What is a Transistor?AMOST iAS i h!|VGS|An MOS Transistor|VGS| ≥ |VT|SDRonA Switch!SDGEE141EECS14113Lecture #3SDSDSwitch Model of MOS TransistorSwitch Model of MOS Transistor|V|G|VGS|SDRonEE141EECS14114Lecture #3|VGS| < |VT||VGS| > |VT|SDSDEE1418NMOS and PMOSNMOS and PMOSNMOS T iPMOS T iVGS> 0GVGS< 0GNMOS TransistorPMOS TransistorEE141EECS14115Lecture #3SDSDMOS Transistors MOS Transistors --Types and SymbolsTypes and SymbolsDDSGSGDDNMOSEnhancementNMOSDepletionEE141EECS14116Lecture #3GSSGPMOS EnhancementBNMOS withBulk ContactEE1419CMOS InverterCMOS InverterEE141EECS14117Lecture #3Building an Inverter with SwitchesBuilding an Inverter with SwitchesEE141EECS14118Lecture #3EE14110The CMOS Inverter: A First GlanceThe CMOS Inverter: A First GlanceVDDVinVoutCLEE141EECS14119Lecture #3CMOS InverterCMOS InverterFirstFirst--Order DC AnalysisOrder DC AnalysisVDDVDDVOL= 0VOH= VDDVM= f(Rn, Rp)VoutVoutRpEE141EECS14120Lecture #3Vin=VDDVin=0RnEE14111Simulated Inverter VTC (Spice)Simulated Inverter VTC (Spice)22.50.511.5Vout(V)EE141EECS14121Lecture #30 0.5 1 1.5 2 2.500.5Vin (V)CMOS Inverter: DC PropertiesCMOS Inverter: DC Properties VOH= OH VOL= VIL= VIH=NMH=EE141EECS14122Lecture #322MH NML= VM=EE14112CMOS Inverter: DC PropertiesCMOS Inverter: DC Properties VOH= VDD= 2.5VOHDD VOL= 0V VM= 1.2V VIL= 1.05V VIH= 1.45VEE141EECS14123Lecture #3IH NMH=1.05V NML= 1.05VCMOS Inverter: Transient ResponseCMOS Inverter: Transient ResponseVDDVDDtpHL= f(RonCL)= 0.69 RnCLVoutVoutRpCLCLEE141EECS14124Lecture #3(a) Low-to-high (b) High-to-lowRnVin =VDDVin =0EE14113CMOS PropertiesCMOS Properties Full rail-to-rail swing Symmetrical VTC Propagation delay function of load capacitance and resistance of transistors No static power dissipationDirect path current during switchingEE141EECS14125Lecture #325Direct path current during switchingA Modern SubA Modern Sub--100 nm Look …100 nm Look …|V|G|VGS|SDRonRoffEE141EECS14126Lecture #3|VGS| < |VT||VGS| > |VT|SDoffSDEE14114Impact on Reliability?Impact on Reliability?EE141EECS14127Lecture #3Impact on Performance?Impact on Performance?EE141EECS14128Lecture #3EE14115Impact on Power/EnergyImpact on Power/EnergyEE141EECS14129Lecture
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