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Berkeley ELENG 141 - Introduction to Layout Editing using Cadence Virtuoso

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University of California Berkeley EE 141 Fall 2008 Laboratory Exercise 2 Introduction to Layout Editing using Cadence Virtuoso Page 1 Page 2 Page 3 Running the Design Rule Checker (DRC) In order to verify that the layout satisfies the manufacturing design rules, you will need to perform a DRC check. To run DRC, click on Verify → DRC… in the menu bar. Note that the rules file is: /home/ff/ee141/gpdk090_v3.9/diva/divaDRC.rul. To run the design rule checker, Click OK. The results will be displayed in the icfb window (also known as the command interpreter window, CIW). If there are no errors, you will see this message: A detailed description of the various design rules can be found in the Design Rules Manual (DRM): /home/ff/ee141/gpdk090_v3.9/docs/gpdk090_DRM.pdf What to do when you actually have an error? To see how the DRC tool reports errors and how you can correct them, change the width of the Metal1 path you created connecting the NMOS transistor to the bottom supply rail (GND) from 0.l2 microns to 0.1 microns (less than the minimum allowable width). Note that the Rules Library button should be unchecked. Use the hotkey ‘q’ toRunning DRC again gives you an error: The layout editor window will highlight the error or errors that occur (as seen below). yqbring up the Edit Path Properties menu and change the width from 0.12 microns to 0.1 microns. To fix errors, simply edit the layout and run DRC again to make sure all errors are removed.Printing Your Work To create a postscript file you can import into your favorite document editor or graphics program, or print on a postscript capable printer, select Design → Plot → Submit… from the menu bar then click on the Plot Options… button in the Submit Plot window. Make sure that you are printing the correct cell view. Set the Display Type to psb, Encapsulated PS as the Plotter Name, and Paper Size to 8.5x11. Check the Center Plot and Fit to Page boxes. Check the Send Plot Only to File box and enter an appropriate filename. This will be placed in the directory where you ran icfb2.Click OK on both forms to generate the postscript file. To view your postscript file, type evince <yourfilename.eps> at the command prompt. End of Lab2. Page 1 Page 2 Page 3 UC Berkeley EE 141 Fall 2009 Last modified: 9/10/2009 by Richie


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Berkeley ELENG 141 - Introduction to Layout Editing using Cadence Virtuoso

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