EE1411EECS1411Lecture #16EE141EE141--Fall 2009Fall 2009Digital Integrated Digital Integrated CircuitsCircuitsLecture 16Lecture 16Power RevisitedPower RevisitedEE1412EECS1412Lecture #16AnnouncementsAnnouncements Homework #7 due Thursday Project #1 due next Thurs. Midterm 2: Thurs. Nov. 5th, 6:30-8:00pm, room TBAEE1413EECS1413Lecture #16Power Power RevisitedRevisitedEE1414EECS1414Lecture #16Transition Activity and PowerTransition Activity and Power Energy consumed in N cycles, EN:EN= CL• VDD2• n0→1n0→1 – number of 0→1 transitions in N cyclesfVCNnfNEPDDLNNNavg⋅⋅⋅⎟⎠⎞⎜⎝⎛=⋅=→∞→∞→210limlimfNnN⋅=→∞→→1010limαfVCPDDLavg⋅⋅⋅=→210αEE1415EECS1415Lecture #16“Dynamic” or timing dependent component ÅType of Logic Function (NOR vs. XOR)“Static” component (does not account for timing)ÅCircuit TopologyÅType of Logic Style (Static vs. Dynamic)ÅSignal StatisticsÅInter-signal CorrelationsÅSignal Statistics and CorrelationsFactors Affecting Transition ActivityFactors Affecting Transition ActivityEE1416EECS1416Lecture #16Type of Logic Function: NORType of Logic Function: NOR011001010100OutBAExample: Static 2-input NOR GateAssume signal probabilitiespA=1 = 1/2pB=1 = 1/2Then transition probabilityp0→1 = pOut=0 x pOut=1= 3/4 x 1/4 = 3/16α0→1= 3/16If inputs switch every cycleEE1417EECS1417Lecture #16Type of Logic Function: NANDType of Logic Function: NAND011101110100OutBAExample: Static 2-input NAND GateAssume signal probabilitiespA=1 = 1/2pB=1 = 1/2Then transition probabilityp0→1 = pOut=0 x pOut=1= 3/4 x 1/4 = 3/16α0→1= 3/16If inputs switch every cycleEE1418EECS1418Lecture #16Type of Logic Function: XORType of Logic Function: XOR011101110000OutBAExample: Static 2-input XOR GateAssume signal probabilitiespA=1 = 1/2pB=1 = 1/2Then transition probabilityp0→1 = pOut=0 x pOut=1=α0→1= If inputs switch in every cycleEE1419EECS1419Lecture #16ClockClock Always switches Often consumes 25-50% of total power Clock gating commonly employedEE14110EECS14110Lecture #16Problem: Problem: ReconvergentReconvergentFanoutFanoutABXZReconvergenceP(Z = 1) = P(B = 1) . P(X = 1 | B=1)Becomes complex and intractable fastEE14111EECS14111Lecture #16InterInter--Signal CorrelationsSignal CorrelationsLogic withoutreconvergent fanoutLogic with reconvergent fanoutABZCAZCBp0→1=(1 –pApB) pApBP(Z = 1) = p(C=1 | B=1) p(B=1)p0→1= 0 Need to use conditional probabilities to model inter-signal correlations CAD tools best for performing such analysis EE14112EECS14112Lecture #16GlitchingGlitchingin Static CMOSin Static CMOSABXCZABC 101 000XZ Gate DelayAlso known asdynamic hazardsThe result is correct,but there is extra power dissipatedEE14113EECS14113Lecture #16Example: Chain of NAND GatesExample: Chain of NAND Gates1Out1Out2Out3Out4Out50 200 400 6000.01.02.03.0Time (ps)Voltage (V)Out8Out6Out2Out6Out1Out3Out7Out5EE14114EECS14114Lecture #16Principles for Power ReductionPrinciples for Power Reduction Most important idea: reduce waste Examples: Don’t switch capacitors you don’t need to– Clock gating, glitch elimination, logic re-structuring Don’t run circuits faster than needed– Power α VDD2– can save a lot by reducing supply for circuits that don’t need to be as fast– Parallelism falls into this category Let’s say we do a good job of that – then what?EE14115EECS14115Lecture #16Energy Energy ––Performance SpacePerformance Space Plot all possible designs on a 2-D plane No matter what you do, can never get below/to the right of the solid line This line is called “Pareto Optimal Curve” Usually (always) follows law of diminishing returnsPerformanceEnergy/opEE14116EECS14116Lecture #16Optimization PerspectiveOptimization Perspective Instead of metrics like EDP, this curve often provides information more directly Ex1: What is minimum energy for XX performance? Ex2: Over what range of performance is a new technique (dotted line) actually beneficial?PerformanceEnergy/opEE14117EECS14117Lecture #16Key ObservationKey Observation Define the Energy/Performance sensitivity of a parameter, for example: At optimal point, sensitivities to all parameters should be the same (ignoring constraints) Must equal slope of the Pareto optimal curve Otherwise, could trade one parameter for another and end up with lower energy at same performanceTTVTEnergy VSPerf V∂∂=∂∂DDDDVDDEnergy VSPerf V∂∂=∂∂EE14118EECS14118Lecture #16Sensitivity ExampleSensitivity ExampleEE14119EECS14119Lecture #16Sensitivity ExampleSensitivity ExampleEE14120EECS14120Lecture #16Next LectureNext Lecture CMOS
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