EE1411EE141EE141--Spring 2008Spring 2008Digital Integrated Digital Integrated CircuitsCircuitsCircuitsCircuitsLecture 5Lecture 5EE141EECS1411Lecture #5MOS Transistor ModelMOS Transistor ModelAnnouncementsAnnouncements Due to family emergency, Prof. Rabaey will be out of town this week and next. We 2/6 : NO lecture – moved to 2/19 Fr. 2/8:: Prof. Alon We 2/13: NO lecture – moved to 2/26 Fr 2/15: Simone Gambini Tu 2/19: Make up lecture (203 McLaughlin) Tu 2/26: Make up lecture (203 McLaughlin)EE141EECS1412Lecture #5p( g) Lab 2 this week! Lab 3 next week Homework #2 is due Fr.EE1412Class MaterialClass Material Last lecture Design Rules Started MOS modeling Today’s lecture MOS transistor modeling –Will see how to use these models to EE141EECS1413Lecture #5understand tradeoffs between CMOS gate delay, power, etc. Reading (3.3.1-3.3.2)MOS TransistorMOS TransistorLast lecture: what causes a transistor to turn on-conceptEE141EECS1414Lecture #5transistor to turn on concept of the threshold voltageEE1413DSGVGS+–Threshold Voltage: ConceptThreshold Voltage: Conceptn+p-substrateBDepletionregionn-channeln+EE141EECS1415Lecture #5B With positive gate bias, electrons pulled toward the gate With large enough bias, enough electrons will be pulled to "invert" the surface (p→n type) Voltage at which surface inverts: “magic” threshold voltage VTThe Threshold VoltageThe Threshold Voltage ThresholdDepletion charge2BTFB FQVCϕϕ=+ +iATFnNln⋅φ=φ Fermi potential()022TT FSB FVV Vγϕϕ=+⋅ + −oxCEE141EECS1416Lecture #52ΦFis approximately 0.6V for p-type substratesγ is the body factorVT0is approximately 0.45V for our processEE1414SVGSVDSTransistor with Gate and Drain BiasTransistor with Gate and Drain Biasn+n+DSGxLV(x)+–IDEE141EECS1417Lecture #5p-substrateBThe Drain CurrentThe Drain Current()iQx= Charge density:i Velocity:()nxυ=Current:EE141EECS1418Lecture #5DI=Current:EE1415Solving the Drain CurrentSolving the Drain Current Integrate along the channel:EE141EECS1419Lecture #5Plot of IPlot of I--V CurveV CurveEE141EECS14110Lecture #5 Is this really what happens?EE1416VGSTransistor in SaturationTransistor in Saturation0< VGS- VT< VDSn+n+SGDVDS> VGS- VTVGS - VT+-EE141EECS14111Lecture #5Pinch-offSaturationSaturation For (VGS– VT) < VDS, the effective drain voltage and current saturate:()22TGSnDVVLWkI −⋅⋅=’ Of course, real drain current isn’t totally independent of VDSFl fhllthdlti(),DS eff GS TVVV=−EE141EECS14112Lecture #5For example, approx. for channel-length modulation:()( )DSTGSnDVVVLWkI ⋅λ+⋅−⋅⋅= 122’EE1417Modes of OperationModes of OperationCutoff:VGS-VT< 00=DILinear (Resistive):VGS-VT> VDS()⎥⎥⎦⎤⎢⎢⎣⎡−⋅−⋅⋅=22DSDSTGSnDVVVVLWkI’EE141EECS14113Lecture #5Saturation:0 < VGS-VT< VDS()( )212nDGS T DSkWIVVVLλ=⋅⋅ − ⋅+⋅’6x 10-4VGS= 2.5 VCurrentCurrent--Voltage Relations:Voltage Relations:A Good Ol’ TransistorA Good Ol’ TransistorQuadraticRelationship2345VGS= 2.0 VV= 1 5 VResistive SaturationVDS= VGS-VTID(A)EE141EECS14114Lecture #50 0.5 1 1.5 2 2.501VGS= 1.5 VVGS= 1.0 VVDS(V)EE1418-42.5x 10V= 2 5 VEarlyCurrentCurrent--Voltage Relations:Voltage Relations:The Deep SubThe Deep Sub--Micron TransistorMicron TransistorLinearRelationship11.52VGS= 2.5 VVGS= 2.0 VVGS= 1.5 VySaturationID(A)EE141EECS14115Lecture #50 0.5 1 1.5 2 2.500.5VGS= 1.0 VVDS(V)Velocity SaturationVelocity Saturations) Velocity saturates due to carrier scattering effectsυn(m/sυsat= 105Constant velocityEE141EECS14116Lecture #5ξ (V/µm)Constant mobility (slope = µ)ξcEE1419Velocity SaturationVelocity SaturationIDLong-channel deviceLongchannel deviceShort-channel deviceVGS = VDDEE141EECS14117Lecture #5VDSVDSATVGS-VTIIDDversus Vversus VGSGS56x 10-42.5x 10-412345ID(A)0.511.52ID(A)quadraticlinearEE141EECS14118Lecture #50 0.5 1 1.5 2 2.50VGS(V)0 0.5 1 1.5 2 2.50VGS(V)quadraticLong Channel(L=2.5μm)Short Channel(L=0.25μm)EE14110Including Velocity SaturationIncluding Velocity SaturationApproximate velocity:pp yContinuity requires that: Integrating to find the current again:2csatnξυμ=EE141EECS14119Lecture #5gg gRegions of OperationRegions of Operation-422.5x 10VGS= 2.5 V56x 10-4VGS= 2.5 VResistiveVDSATVGS-VT00.511.52VGS= 2.0 VVGS= 1.5 VVGS= 1.0 V01234VGS= 2.0 VVGS= 1.5 VVGS= 1.0 VResistive SaturationVDS= VGS-VTID(A)ID(A)VelocitySaturationEE141EECS14120Lecture #50 0.5 1 1.5 2 2.500 0.5 1 1.5 2 2.50VDS(V) VDS(V)Long Channel(L=2.5μm)Short Channel(L=0.25μm)W/L=1.5EE14111Simplified Velocity SaturationSimplified Velocity Saturations) Assume velocity linear until hit υsatυn(m/sυsat= 105Constant velocityEE141EECS14121Lecture #5ξ (V/µm)ξc= υsat/μSimplified Velocity Saturation Simplified Velocity Saturation (cont’d)(cont’d) Assume VDSAT= ξcL when (VGS –VT) > ξcLV)VDSAT(VξcLActual VDSATEE141EECS14122Lecture #5VGS-VT(V)ξcLEE14112Simplified ModelSimplified Model-42.5x 10VV Define VGT= VGS–VT, VVSAT= ξc·L11.52VelocitySaturationID(A)LinearVDS= VVSATEE141EECS14123Lecture #50 0.5 1 1.5 2 2.500.5VDS(V)VDS= VGTVGT= VVSATSaturationA Unified Model for Manual AnalysisA Unified Model for Manual Analysisdefine VGT= VGS–VTDGIDS()2,'1DSeffVWIk VV Vλ⎛⎞+⎜⎟for VGT≤ 0: ID=0for VGT≥ 0:GTGSTEE141EECS14124Lecture #5B(),,'12ffDGT DS eff DSIk VV VLλ=⋅⋅ ⋅ − ⋅+⋅⎜⎟⎜⎟⎝⎠with VDS,eff= min (VGT, VDS, VVSAT)EE14113Simple Model versus SPICE Simple Model versus SPICE 2.5x 10-4VDS=VVSAT11.52ID(A)EE141EECS14125Lecture #50 0.5 1 1.5 2 2.500.5VDS(V)VDS=VGTTransistor Model for Manual AnalysisTransistor Model for Manual AnalysisVEE141EECS14126Lecture #5Textbook: page 103EE14114A PMOS TransistorA PMOS Transistor0x 10-4•All variables negativeVGS = -1.0V-0.6-0.4-0.2ID(A)All variables negative• I prefer to work with absolute valuesVGS = -1.5VVGS = -2.0VEE141EECS14127Lecture #5-2.5 -2 -1.5 -1 -0.5 0-1-0.8VDS(V)VGS = -2.5VNext LectureNext Lecture Using the MOS model: Inverter VTC and delayEE141EECS14128Lecture
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