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Berkeley ELENG 141 - Speed-Area Optimized 8-Bit Adder

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Speed-Area Optimized 8-Bit AdderCritical Path AnalysisSlide 3Sizing CharacteristicsSizing OptimizationDynamic Functionality CheckStatic Functionality CheckLayout TechniquesSlide 9Slide 10UC Berkeley, Dept of EECSEE141, Fall 2005, Project 2Speed-Area Optimized 8-Bit AdderPresentation SlidesEE141 – Project 2 2Critical Path AnalysisCritical Path: A: (00000000 > 10101010) B: (00000000 > 11010101) Cin: (0 > 0)tcriticaltsetup 2tcarry 4tmuxEE141 – Project 2 3Critical Path AnalysisCritical Path indicated by Critical transition: A = 10110111; B=01001001; Cin = 1:Carry generated in the first bit and then ripples through the Multiplexers holding the precomputed values until it reaches the final sum stage and generates sum8. These Inputs ensure that sum 8 has to wait for Carry_out_7 to reach it for the sum to be valid. Critical path equation : tcritical = tsetup + 2tcarry + 4tmux + tsum.EE141 – Project 2 4Sizing CharacteristicsTo CarryoutEE141 – Project 2 5Sizing Optimization16XStage Z: LE=1 B=133.84u/1.92u960n960n2.88u/720n2.4u/1.2 u0.96n0.96n1.2u 0.96n0.48u0.48u16XGin7Gin5Gin0 Gin1Gin2Gin3Gin4Gin6Pin7Pin1 Pin2Pin5Pin3Pin4Pin6Pin0AStage V: LE=1, B=1Stage W: LE=1, B=4Stage X : LE=4/3, B=1Stage Y: LE=2, B=1Area Concern0.96u/0.48u1638123411FOLE8.2416384:5/15/1PEBranching00.1v78.2w08.4y70.5z94.1xSize:2.542.5Manchester SizingEE141 – Project 2 6Dynamic Functionality Check0 0 00 1 00 0 00 0 00 1 00 0 00 0 00 0 10 1 0EE141 – Project 2 7Static Functionality CheckS0S1S2S3S4S5S6S7CoutEE141 – Project 2 8Layout TechniquesSize : 1265.22 m2(33.00m x 38.34m)Critical Path drawn in arrowAspect Ratio = 1.162Routing•Metal 1−Horizontal Line−VDD, GND•Metal 2:−Vertical Line•Metal 3:−Clock SignalsFA0 FA1 FA2 FA3FA7 FA6 FA5 FA4INPUT BUFFER INPUT BUFFERINPUT BUFFER INPUT BUFFEROUTPUTBUFFEROUTPUTBUFFEROUTPUTBUFFEROUTPUTBUFFERCLOCKCHAINEE141 – Project 2 9First Stage (2 bits)Third Stage (2 bits)Last Bit (1 bit)Outputs (Buffers)Second Stage (3 bits)BypassMuxCout<1>Cout<6>B<0>A<0>P<0>Cout<0>Cmuxout (“Cout<4>”)Cout<5>S<7>Layout TechniquesEE141 – Project 2 10Layout TechniquesFA 2FA 1BufferFA 3FA 4BufferFA 6FA 5BufferFA 7FA


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Berkeley ELENG 141 - Speed-Area Optimized 8-Bit Adder

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