Slide 1AgendaAgendaCS61c is NOT really about C ProgrammingOld School CS61cNew School CS61cSlide 7Old-School Machine StructuresNew-School Machine Structures (It’s a bit more complicated!)6 Great Ideas in Computer ArchitectureGreat Idea #1: Levels of Representation/Interpretation#2: Moore’s LawGreat Idea #3: Principle of Locality/ Memory HierarchyGreat Idea #4: ParallelismGreat Idea #5: Performance Measurement and ImprovementGreat Idea #6: Dependability via RedundancyGreat Idea #6: Dependability via RedundancySlide 18Slide 19AgendaCourse InformationRemindersCourse OrganizationEECS Grading PolicyLate PolicyPolicy on Assignments and Independent WorkSlide 27The Rules (and we really mean it!)Architecture of a LectureAgendaComputer Eras: Mainframe 1950s-60sMinicomputer Eras: 1970sPC Era: Mid 1980s - Mid 2000sPostPC Era: Late 2000s - ??Advanced RISC Machine (ARM) instruction set inside the iPhoneiPhone InnardsThe Big Switch: Cloud ComputingWhy Cloud Computing Now?Coping with FailuresAgendaCoping with FailuresWarehouse Scale ComputersE.g., Google’s Oregon WSCEquipment Inside a WSCServer, Rack, ArrayGoogle Server InternalsDatacenter PowerCoping with Performance in ArrayCoping with Workload VariationSlide 50Power vs. Server UtilizationPower Usage EffectivenessPUE in the Wild (2007)High PUE: Where Does Power Go?Google WSC A PUE: 1.24Containers in WSCsGoogle WSC A PUE: 1.24Google WSC A PUE: 1.24Google WSC PUE: Quarterly AvgSummaryCS 61C: Great Ideas in Computer Architecture (Machine Structures)Course IntroductionInstructors:Randy H. KatzDavid A. Pattersonhttp://inst.eecs.Berkeley.edu/~cs61c/sp111Spring 2011 -- Lecture #101/14/2019Agenda•Great Ideas in Computer Architecture•Administrivia•PostPC Era: From Phones to Datacenters•Technology Break•Warehouse Scale Computers in Depth01/14/2019 Spring 2011 -- Lecture #1 2Agenda•Great Ideas in Computer Architecture•Administrivia•PostPC Era: From Phones to Datacenters•Technology Break•Warehouse Scale Computers in Depth01/14/2019 Spring 2011 -- Lecture #1 3CS61c is NOT really about C Programming•It is about the hardware-software interface–What does the programmer need to know to achieve the highest possible performance•Languages like C are closer to the underlying hardware, unlike languages like Scheme! –Allows us to talk about key hardware features in higher level terms–Allows programmer to explicitly harness underlying hardware parallelism for high performance01/14/2019 Spring 2011 -- Lecture #1 4Old School CS61c5Spring 2011 -- Lecture #101/14/2019New School CS61c6Spring 2011 -- Lecture #101/14/2019Personal Mobile Devices7Spring 2011 -- Lecture #101/14/2019WarehouseScale ComputerOld-School Machine StructuresCS61cI/O systemProcessorCompilerOperatingSystem(Mac OSX)Application (ex: browser)Digital DesignCircuit DesignInstruction Set ArchitectureDatapath & Control transistorsMemoryHardwareSoftwareAssembler01/14/2019 8Spring 2011 -- Lecture #1New-School Machine Structures(It’s a bit more complicated!)•Parallel RequestsAssigned to computere.g., Search “Katz”•Parallel ThreadsAssigned to coree.g., Lookup, Ads•Parallel Instructions>1 instruction @ one timee.g., 5 pipelined instructions•Parallel Data>1 data item @ one timee.g., Add of 4 pairs of words•Hardware descriptionsAll gates functioning in parallel at same time01/14/2019 Spring 2011 -- Lecture #1 9SmartPhoneWarehouse Scale ComputerSoftware HardwareHarnessParallelism &Achieve HighPerformanceLogic Gates CoreCoreCoreCore… Memory (Cache) Memory (Cache)Input/OutputInput/OutputComputerMain MemoryMain MemoryCore Instruction Unit(s) Instruction Unit(s) FunctionalUnit(s) FunctionalUnit(s)A3+B3A2+B2A1+B1A0+B0Project 2Project 1Project 3Project 46 Great Ideas in Computer Architecture1. Layers of Representation/Interpretation2. Moore’s Law3. Principle of Locality/Memory Hierarchy4. Parallelism5. Performance Measurement & Improvement6. Dependability via Redundancy01/14/2019 Spring 2011 -- Lecture #1 10Great Idea #1: Levels of Representation/Interpretationlw $t0, 0($2)lw $t1, 4($2)sw $t1, 0($2)sw $t0, 4($2)High Level LanguageProgram (e.g., C)Assembly Language Program (e.g., MIPS)Machine Language Program (MIPS)Hardware Architecture Description(e.g., block diagrams) CompilerAssemblerMachine Interpretationtemp = v[k];v[k] = v[k+1];v[k+1] = temp;0000 1001 1100 0110 1010 1111 0101 10001010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 Logic Circuit Description(Circuit Schematic Diagrams)Architecture ImplementationAnything can be representedas a number, i.e., data or instructions01/14/2019 11Spring 2011 -- Lecture #101/14/2019 Spring 2011 -- Lecture #1 12Predicts: 2X Transistors / chip every 2 yearsGordon MooreIntel CofounderB.S. Cal 1950!# of transistors on an integrated circuit (IC)Year#2: Moore’s LawGreat Idea #3: Principle of Locality/Memory Hierarchy01/14/2019 Spring 2011 -- Lecture #1 13Great Idea #4: Parallelism01/14/2019 Spring 2011 -- Lecture #1 14Great Idea #5: Performance Measurement and Improvement•Matching application to underlying hardware to exploit:–Locality–Parallelism–Special hardware features, like specialized instructions (e.g., matrix manipulation)•Latency–How long to set the problem up–How much faster does it execute once it gets going–It is all about time to finish01/14/2019 Spring 2011 -- Lecture #1 15Spring 2011 -- Lecture #1Great Idea #6: Dependability via Redundancy•Redundancy so that a failing piece doesn’t make the whole system fail01/14/2019 161+1=21+1=21+1=21+1=21+1=11+1=11+1=21+1=22 of 3 agreeFAIL!Increasing transistor density reduces the cost of redundancySpring 2011 -- Lecture #1Great Idea #6: Dependability via Redundancy•Applies to everything from datacenters to storage to memory–Redundant datacenters so that can lose 1 datacenter but Internet service stays online–Redundant disks so that can lose 1 disk but not lose data (Redundant Arrays of Independent Disks/RAID)–Redundant memory bits of so that can lose 1 bit but no data (Error Correcting Code/ECC Memory)01/14/2019 1701/14/2019 Spring 2011 -- Lecture #1 1801/14/2019 Spring 2011 -- Lecture #1 19Agenda•Great Ideas in Computer Architecture•Administrivia•Technology Break•From Phones to Datacenters01/14/2019 Spring 2011 -- Lecture #1 20Course Information•Course Web:
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