inst eecs berkeley edu cs61c CS61C Machine Structures Lecture 9 Introduction to MIPS Data Transfer Decisions I Lecturer PSOE Dan Garcia www cs berkeley edu ddgarcia Future HVD 1 TB disks The future of digital storage past the DVD Blu Ray and HD DVD may be the Holographic Versatile Disc A massive 1 TB on each 200 DVDs 1TB www zdnet com au news hardware 0 2000061702 39180148 00 htm CS61C L09 Introduction to MIPS Data Transfer Decisions I 1 Garcia UCB Review In MIPS Assembly Language Registers replace C variables One Instruction simple operation per line Simpler is Better Smaller is Faster New Instructions add addi sub New Registers C Variables s0 s7 Temporary Variables t0 t7 Zero zero CS61C L09 Introduction to MIPS Data Transfer Decisions I 2 Garcia UCB Assembly Operands Memory C variables map onto registers what about large data structures like arrays 1 of 5 components of a computer memory contains such data structures But MIPS arithmetic instructions only operate on registers never directly on memory Data transfer instructions transfer data between registers and memory Memory to register Register to memory CS61C L09 Introduction to MIPS Data Transfer Decisions I 3 Garcia UCB Anatomy 5 components of any Computer Registers are in the datapath of the processor if operands are in memory we must transfer them to the processor to operate on them and then transfer back to memory when done Personal Computer Computer Processor Control brain Datapath Registers Memory Devices Input Store to Load from Output These are data transfer instructions CS61C L09 Introduction to MIPS Data Transfer Decisions I 4 Garcia UCB Data Transfer Memory to Reg 1 4 To transfer a word of data we need to specify two things Register specify this by 0 31 or symbolic name s0 t0 Memory address more difficult Think of memory as a single onedimensional array so we can address it simply by supplying a pointer to a memory address Other times we want to be able to offset from this pointer Remember Load FROM memory CS61C L09 Introduction to MIPS Data Transfer Decisions I 5 Garcia UCB Data Transfer Memory to Reg 2 4 To specify a memory address to copy from specify two things A register containing a pointer to memory A numerical offset in bytes The desired memory address is the sum of these two values Example 8 t0 specifies the memory address pointed to by the value in t0 plus 8 bytes CS61C L09 Introduction to MIPS Data Transfer Decisions I 6 Garcia UCB Data Transfer Memory to Reg 3 4 Load Instruction Syntax 1 2 3 4 where 1 operation name 2 register that will receive value 3 numerical offset in bytes 4 register containing pointer to memory MIPS Instruction Name lw meaning Load Word so 32 bits or one word are loaded at a time CS61C L09 Introduction to MIPS Data Transfer Decisions I 7 Garcia UCB Data Transfer Memory to Reg 4 4 Data flow Example lw t0 12 s0 This instruction will take the pointer in s0 add 12 bytes to it and then load the value from the memory pointed to by this calculated sum into register t0 Notes s0 is called the base register 12 is called the offset offset is generally used in accessing elements of array or structure base reg points to beginning of array or structure CS61C L09 Introduction to MIPS Data Transfer Decisions I 8 Garcia UCB Data Transfer Reg to Memory Also want to store from register into memory Store instruction syntax is identical to Load s MIPS Instruction Name sw meaning Store Word so 32 bits or one word are loaded at a time Data flow Example sw t0 12 s0 This instruction will take the pointer in s0 add 12 bytes to it and then store the value from register t0 into that memory address Remember Store INTO memory CS61C L09 Introduction to MIPS Data Transfer Decisions I 9 Garcia UCB Pointers v Values Key Concept A register can hold any 32 bit value That value can be a signed int an unsigned int a pointer memory address and so on If you write add t2 t1 t0 then t0 and t1 better contain values If you write lw t2 0 t0 then t0 better contain a pointer Don t mix these up CS61C L09 Introduction to MIPS Data Transfer Decisions I 10 Garcia UCB Addressing Byte vs word Every word in memory has an address similar to an index in an array Early computers numbered words like C numbers elements of an array Memory 0 Memory 1 Memory 2 Called the address of a word Computers needed to access 8 bit bytes as well as words 4 bytes word Today machines address memory as bytes i e Byte Addressed hence 32bit 4 byte word addresses differ by 4 Memory 0 Memory 4 Memory 8 CS61C L09 Introduction to MIPS Data Transfer Decisions I 11 Garcia UCB Compilation with Memory What offset in lw to select A 5 in C 4x5 20 to select A 5 byte v word Compile by hand using registers g h A 5 g s1 h s2 s3 base address of A 1st transfer from memory to register lw t0 20 s3 t0 gets A 5 Add 20 to s3 to select A 5 put into t0 Next add it to h and place in g add s1 s2 t0 s1 h A 5 CS61C L09 Introduction to MIPS Data Transfer Decisions I 12 Garcia UCB Notes about Memory Pitfall Forgetting that sequential word addresses in machines with byte addressing do not differ by 1 Many an assembly language programmer has toiled over errors made by assuming that the address of the next word can be found by incrementing the address in a register by 1 instead of by the word size in bytes So remember that for both lw and sw the sum of the base address and the offset must be a multiple of 4 to be word aligned CS61C L09 Introduction to MIPS Data Transfer Decisions I 13 Garcia UCB More Notes about Memory Alignment MIPS requires that all words start at byte addresses that are multiples of 4 bytes Last hex digit 0 1 2 3 of address is Aligned 0 4 8 or Chex 1 5 9 or Dhex Not Aligned 2 6 A or Ehex 3 7 B or Fhex Called Alignment objects must fall on address that is multiple of their size CS61C L09 Introduction to MIPS Data Transfer Decisions I 14 Garcia UCB Role of Registers vs Memory What if more variables than registers Compiler tries to keep most frequently used variable in registers Less common in memory spilling Why not keep all variables in memory Smaller is faster registers are faster than memory Registers more versatile MIPS arithmetic instructions can read 2 operate on them and write 1 per instruction MIPS data transfer only read or write 1 operand per instruction and no operation CS61C L09 Introduction to MIPS Data Transfer Decisions I 15 Garcia UCB Administrivia HW3 due Wed 23 59 Project 1 up soon due in 10 days Hope you remember your …
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