CS61C L09 Introduction to MIPS: Data Transfer & Decisions I (1)Garcia © UCBLecturer PSOE Dan Garciawww.cs.berkeley.edu/~ddgarciainst.eecs.berkeley.edu/~cs61cCS61C : Machine Structures Lecture 9 – Introduction to MIPS Data Transfer & Decisions IFuture HVD 1 TB disks! ⇒ The future of digital storage(past the DVD, Blu-Ray and HD DVD)may be the Holographic Versatile Disc.A massive 1 TB on each (200 DVDs)!www.zdnet.com.au/news/hardware/0,2000061702,39180148,00.htm1TBCS61C L09 Introduction to MIPS: Data Transfer & Decisions I (2)Garcia © UCBReview• In MIPS Assembly Language:• Registers replace C variables• One Instruction (simple operation) per line• Simpler is Better, Smaller is Faster• New Instructions:add, addi, sub• New Registers:C Variables: $s0 - $s7Temporary Variables: $t0 - $t7Zero: $zeroCS61C L09 Introduction to MIPS: Data Transfer & Decisions I (3)Garcia © UCBAssembly Operands: Memory• C variables map onto registers; whatabout large data structures like arrays?• 1 of 5 components of a computer:memory contains such data structures• But MIPS arithmetic instructions onlyoperate on registers, never directly onmemory.• Data transfer instructions transfer databetween registers and memory:• Memory to register• Register to memoryCS61C L09 Introduction to MIPS: Data Transfer & Decisions I (4)Garcia © UCBAnatomy: 5 components of any ComputerPersonal Computer Processor ComputerControl(“brain”)DatapathRegistersMemory DevicesInputOutputLoad (from)Load (from)Store (to)Store (to)These are “data transfer” instructions…Registers are in the datapath of theprocessor; if operands are in memory,we must transfer them to theprocessor to operate on them, andthen transfer back to memory whendone.CS61C L09 Introduction to MIPS: Data Transfer & Decisions I (5)Garcia © UCBData Transfer: Memory to Reg (1/4)• To transfer a word of data, we need tospecify two things:• Register: specify this by # ($0 - $31) orsymbolic name ($s0,…, $t0, …)• Memory address: more difficult- Think of memory as a single one-dimensional array, so we can addressit simply by supplying a pointer to amemory address.- Other times, we want to be able tooffset from this pointer.• Remember: “Load FROM memory”CS61C L09 Introduction to MIPS: Data Transfer & Decisions I (6)Garcia © UCBData Transfer: Memory to Reg (2/4)• To specify a memory address to copyfrom, specify two things:• A register containing a pointer to memory• A numerical offset (in bytes)• The desired memory address is thesum of these two values.• Example: 8($t0)• specifies the memory address pointed toby the value in $t0, plus 8 bytesCS61C L09 Introduction to MIPS: Data Transfer & Decisions I (7)Garcia © UCBData Transfer: Memory to Reg (3/4)• Load Instruction Syntax:1 2,3(4)• where1) operation name2) register that will receive value3) numerical offset in bytes4) register containing pointer to memory• MIPS Instruction Name:•lw (meaning Load Word, so 32 bits or one word are loaded at a time)CS61C L09 Introduction to MIPS: Data Transfer & Decisions I (8)Garcia © UCBData Transfer: Memory to Reg (4/4)Example:lw $t0,12($s0)This instruction will take the pointer in $s0, add12 bytes to it, and then load the value from thememory pointed to by this calculated sum intoregister $t0• Notes:•$s0 is called the base register• 12 is called the offset• offset is generally used in accessing elementsof array or structure: base reg points tobeginning of array or structureData flowCS61C L09 Introduction to MIPS: Data Transfer & Decisions I (9)Garcia © UCBData Transfer: Reg to Memory• Also want to store from register into memory• Store instruction syntax is identical to Load’s• MIPS Instruction Name:sw (meaning Store Word, so 32 bits or oneword are loaded at a time)• Example: sw $t0,12($s0)This instruction will take the pointer in $s0, add12 bytes to it, and then store the value fromregister $t0 into that memory address• Remember: “Store INTO memory”Data flowCS61C L09 Introduction to MIPS: Data Transfer & Decisions I (10)Garcia © UCBPointers v. Values• Key Concept: A register can hold any32-bit value. That value can be a(signed) int, an unsigned int, apointer (memory address), and so on• If you write add $t2,$t1,$t0then $t0 and $t1better contain values• If you write lw $t2,0($t0)then $t0 better contain a pointer• Don’t mix these up!CS61C L09 Introduction to MIPS: Data Transfer & Decisions I (11)Garcia © UCBAddressing: Byte vs. word• Every word in memory has an address,similar to an index in an array• Early computers numbered words likeC numbers elements of an array:•Memory[0], Memory[1], Memory[2], …Called the “address” of a word• Computers needed to access 8-bitbytes as well as words (4 bytes/word)• Today machines address memory asbytes, (i.e.,“Byte Addressed”) hence 32-bit (4 byte) word addresses differ by 4•Memory[0], Memory[4], Memory[8], …CS61C L09 Introduction to MIPS: Data Transfer & Decisions I (12)Garcia © UCBCompilation with Memory• What offset in lw to select A[5] in C?• 4x5=20 to select A[5]: byte v. word• Compile by hand using registers:g = h + A[5];• g: $s1, h: $s2, $s3:base address of A• 1st transfer from memory to register:lw $t0,20($s3) # $t0 gets A[5]• Add 20 to $s3 to select A[5], put into $t0• Next add it to h and place in gadd $s1,$s2,$t0 # $s1 = h+A[5]CS61C L09 Introduction to MIPS: Data Transfer & Decisions I (13)Garcia © UCBNotes about Memory• Pitfall: Forgetting that sequentialword addresses in machines withbyte addressing do not differ by 1.• Many an assembly languageprogrammer has toiled over errors madeby assuming that the address of the nextword can be found by incrementing theaddress in a register by 1 instead of bythe word size in bytes.• So remember that for both lw and sw,the sum of the base address and theoffset must be a multiple of 4 (to be wordaligned)CS61C L09 Introduction to MIPS: Data Transfer & Decisions I (14)Garcia © UCBMore Notes about Memory: Alignment0 1 2 3AlignedNotAligned• MIPS requires that all words start at byteaddresses that are multiples of 4 bytes• Called Alignment: objects must fall onaddress that is multiple of their size.0, 4, 8, or ChexLast hex digit of address is:1, 5, 9, or Dhex2, 6, A, or Ehex3, 7, B, or FhexCS61C L09 Introduction to MIPS: Data Transfer & Decisions I (15)Garcia © UCBRole of Registers vs. Memory• What if more
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