Outline Review Parameter Passing on Stacks Pipelining Analogy CS61C Introduction to Pipelining Pipelining Instruction Execution Administrivia What s this Stuff Bad for Lecture 25 Hazards to Pipelining Solutions to Hazards April 28 1999 Dave Patterson http cs berkeley edu patterson www inst eecs berkeley edu cs61c schedule html cs 61C L25 pipeline 1 Patterson Spring 99 UCB Advanced Pipelining Concepts by Analogy Conclusion cs 61C L25 pipeline 2 Patterson Spring 99 UCB Pipelining is Natural Laundry Example Review 1 1 Every machine has a convention for how arguments are passed In MIPS where do the arguments go if you are passing more than 4 words Stack Ann Brian Cathy Dave each have one load of A B C D clothes to wash dry fold and put away It is sometimes useful to have a variable number of arguments Washer takes 30 minutes The C convention is to use Dryer takes 30 minutes fmt is used to determine the number of variables and their types Folder takes 30 minutes Stasher takes 30 minutes to put clothes into drawers cs 61C L25 pipeline 3 Patterson Spring 99 UCB cs 61C L25 pipeline 4 Patterson Spring 99 UCB Sequential Laundry 6 PM 7 T a s k A 8 10 9 Pipelined Laundry Start work ASAP 11 12 1 2 AM 6 PM 7 3030 30 30 30 30 30 30 3030 30 30 3030 30 30 Time T a s k B C O r d e r O r d e r Sequential laundry takes 8 hours for 4 loads Patterson Spring 99 UCB 3030 30 30 30 30 30 10 11 12 1 2 AM Time A B 6 PM 7 8 A B C D cs 61C L25 pipeline 7 Pipelined laundry takes 3 5 hours for 4 loads Patterson Spring 99 UCB Pipelining Lessons Pipelining doesn t help 9 latency of single task it helps throughput of Time entire workload 30 30 30 30 30 30 30 D cs 61C L25 pipeline 6 Pipelining Lessons O r d e r 9 C D cs 61C L25 pipeline 5 T a s k 8 Multiple tasks operating simultaneously using different resources Potential speedup Number pipe stages Time to fill pipeline and time to drain it reduces speedup 2 3X v 4X in this example Patterson Spring 99 UCB T a s k Suppose new Washer takes 20 6 PM 7 8 9 minutes new Time Stasher takes 20 minutes How much 30 30 30 30 30 30 30 faster is pipeline A B O r d e r C D cs 61C L25 pipeline 8 Pipeline rate limited by slowest pipeline stage Unbalanced lengths of pipe stages also reduces speedup Patterson Spring 99 UCB Review Steps in Executing MIPS Lec 20 1 Ifetch Fetch Instruction Increment PC 2 Decode Instruction Read Registers 3 Execute Mem ref Calculate Address Arith log Perform Operation Branch Compare if operands 4 Memory Load Read Data from Memory Store Write Data to Memory Branch if operands Change PC 5 Write Back Write Data to Register cs 61C L25 pipeline 9 Patterson Spring 99 UCB Review A Datapath for MIPS Lec 20 Pipelined Execution Representation Time IFtch Dcd Exec Mem WB IFtch Dcd Exec Mem WB IFtch Dcd Exec Mem WB IFtch Dcd Exec Mem WB IFtch Dcd Exec Mem WB Program Flow Every instruction takes same number of steps also called pipeline stages cs 61C L25 pipeline 10 Time clock cycles Registers ALU Data Cache I n I D Reg Reg Load s I D Reg Reg t Add r I D Reg Reg Store O I D Reg Reg Sub r I D Reg Reg d Or e r right half highlight means read left half write ALU PC Patterson Spring 99 UCB Graphical Pipeline Representation Stage 5 Instruction Cache IFtch Dcd Exec Mem WB ALU Stage 2 Stage 3 Stage 4 ALU IFtch Dcd Exec Mem WB cs 61C L25 pipeline 11 Reg ALU I D ALU Use data path figure to represent pipeline ALU Stage 1 Reg Patterson Spring 99 UCB cs 61C L25 pipeline 12 Patterson Spring 99 UCB Example Administrivia Suppose 2 ns for memory access 2 ns for ALU operation and 1 ns for register file read or write Project 6 last Due Today Nonpipelined Execution 11th homework last Due Friday 4 30 7PM lw IF Read Reg ALU Memory Write Reg 2 1 2 2 1 8 ns add IF Read Reg ALU Write Reg 2 1 2 1 6 ns Next Readings 7 5 Exercises 2 6 2 13 6 1 6 3 6 4 Pipelined Execution Max IF Read Reg ALU Memory Write Reg 2 ns cs 61C L25 pipeline 13 Patterson Spring 99 UCB Patterson Spring 99 UCB What s This Stuff Potentially Bad For Administrivia Rest of 61C F 4 30 Review Caches TLB VM Section 7 5 M 5 3 Deadline to correct your grade record W 5 5 Review Interrupts Polling A 7 F 5 7 61C Summary Your Cal heritage HKN Course Evalution Due Final 61C Survey in lab Return Sun 5 9 Final Review starting 2PM 1 Pimintel W 5 12 Final 5PM 1 Pimintel Need Alternative Final Contact mds cory cs 61C L25 pipeline 15 cs 61C L25 pipeline 14 Patterson Spring 99 UCB Linking Entertainment to Violence 100s of studies in recent decades have revealed a direct correlation between exposure to media violence including video games and increased aggression We are reaching that stage of desensitization at which the inflicting of pain and suffering has become a source of entertainment vicarious pleasure rather than revulsion We are learning to kill and we are learning to like it Like the tobacco industry the evidence is there The 14 year old boy who opened fire on a prayer group in a Ky school foyer in 1997 was a video game expert He had never fired a pistol before but in the ensuing melee he fired 8 shots hit 8 people and killed 3 The average law enforcement officer in the United States at a distance of 7 yards hits fewer than 1 in 5 shots Because of freedom of speech is a value that we don t want to compromise it really comes down to the people creating these games That s where the responsibility lies N Y Times 4 26 99 cs 61C L25 pipeline 16 Patterson Spring 99 UCB Pipeline Hazard Matching socks in later load 6 PM 7 T a s k 8 9 10 12 1 2 AM Time 3030 30 30 30 30 30 A 11 Limits to pipelining Hazards prevent next instruction from executing during its designated clock cycle Structural hazards HW cannot support this combination of instructions single person to fold and put clothes away bubble B C O r d e r Problems for Computers Control hazards Pipelining of branches other instructions stall the pipeline until the hazard bubbles in the pipeline D E F A depends on D stall since folder tied up cs 61C L25 pipeline 17 Patterson Spring 99 UCB Single Memory is a Structural Hazard Time clock cycles ALU I n I D Reg Reg Load s …
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