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Berkeley COMPSCI 61C - Introduction to Synchronous Digital Systems

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CS61C L14 Introduction to Synchronous Digital Systems (1 ) Beamer, Summer 2007 © UCBScott Beamer, Instructorinst.eecs.berkeley.edu/~cs61cCS61C : Machine Structures Lecture #14Introduction to Synchronous Digital Systems2007-7-18CS61C L14 Introduction to Synchronous Digital Systems (2 ) Beamer, Summer 2007 © UCBReviewC program: foo.cAssembly program: foo.sExecutable(mach lang pgm): a.outCompilerAssemblerLinkerLoaderMemoryObject(mach lang module): foo.olib.oCS61C L14 Introduction to Synchronous Digital Systems (3 ) Beamer, Summer 2007 © UCB61CWhat are “Machine Structures”?Coordination of many levels of abstractionI/O systemProcessorCompilerOperatingSystem(MacOS X)Application (Netscape)Digital DesignCircuit DesignInstruction Set ArchitectureDatapath & Control transistorsMemoryHardwareSoftwareAssemblerWe’ll investigate lower abstraction layers!(contract between HW & SW)CS61C L14 Introduction to Synchronous Digital Systems (4 ) Beamer, Summer 2007 © UCBBelow the Program• High-level language program (in C) swap int v[], int k){int temp;temp = v[k];v[k] = v[k+1];v[k+1] = temp;}• Assembly language program (for MIPS)swap: sll $2, $5, 2add $2, $4,$2lw $15, 0($2)lw $16, 4($2)sw $16, 0($2)sw $15, 4($2)jr $31• Machine (object) code (for MIPS) 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 . . .C compilerassembler?CS61C L14 Introduction to Synchronous Digital Systems (5 ) Beamer, Summer 2007 © UCBSynchronous Digital SystemsSynchronous:• Means all operations are coordinated bya central clock.- It keeps the “heartbeat” of the system!Digital:• Mean all values are represented bydiscrete values• Electrical signals are treated as 1’s and0’s and grouped together to form words.The hardware of a processor, such as the MIPS, is anexample of a Synchronous Digital SystemCS61C L14 Introduction to Synchronous Digital Systems (6 ) Beamer, Summer 2007 © UCBLogic Design• Next 2 weeks: we’ll study how a modern processoris built; starting with basic elements as buildingblocks.• Why study hardware design?• Understand capabilities and limitations ofhardware in general and processors inparticular.• What processors can do fast and what theycan’t do fast (avoid slow things if you want yourcode to run fast!)• Background for more detailed hardware courses(CS 150, CS 152)• There is just so much you can do withprocessors. At some point you may need todesign your own custom hardware.CS61C L14 Introduction to Synchronous Digital Systems (7 ) Beamer, Summer 2007 © UCBLogic Gates• Basic building blocks are logic gates.• In the beginning, did ad hoc designs, andthen saw patterns repeated, gave names• Can build gates with transistors andresistors• Then found theoretical basis for design• Can represent and reason about gates withtruth tables and Boolean algebra• Assume know some truth tables andBoolean algebra from a math or circuitscourse.• Section B.2 in the textbook has a reviewCS61C L14 Introduction to Synchronous Digital Systems (8 ) Beamer, Summer 2007 © UCBPhysical HardwareLet’s look closer…PowerPCCS61C L14 Introduction to Synchronous Digital Systems (9 ) Beamer, Summer 2007 © UCBTransistors 101• MOSFET• Metal-Oxide-SemiconductorField-Effect Transistor• Come in two types:- n-type NMOSFET- p-type PMOSFET• For n-type (p-type opposite)• If voltage not enough between G & S,transistor turns “off” (cut-off)and Drain-Source NOT connected• If the G & S voltage is high enough,transistor turns “on” (saturation)and Drain-Source ARE connectedp-typen-typeDGSDGSSide viewwww.wikipedia.org/wiki/MosfetCS61C L14 Introduction to Synchronous Digital Systems (1 0) Beamer, Summer 2007 © UCBTransistor Circuit Rep. vs. Block diagram• Chips is composed of nothing buttransistors and wires.• Small groups of transistors form usefulbuilding blocks.• Block are organized in a hierarchy to buildhigher-level blocks: ex: adders.a b c0 0 10 1 11 0 11 1 0“1” (voltage source)“0” (ground)CS61C L14 Introduction to Synchronous Digital Systems (1 1) Beamer, Summer 2007 © UCBSignals and Waveforms: ClocksCS61C L14 Introduction to Synchronous Digital Systems (1 2) Beamer, Summer 2007 © UCBSignals and Waveforms: AddersCS61C L14 Introduction to Synchronous Digital Systems (1 3) Beamer, Summer 2007 © UCBSignals and Waveforms: GroupingBus - more than one signal treated as a unitCS61C L14 Introduction to Synchronous Digital Systems (1 4) Beamer, Summer 2007 © UCBSignals and Waveforms: Circuit DelayCS61C L14 Introduction to Synchronous Digital Systems (1 5) Beamer, Summer 2007 © UCBType of Circuits• Synchronous Digital Systems are madeup of two basic types of circuits:• Combinational Logic (CL) circuits• Our previous adder circuit is an example.• Output is a function of the inputs only.• Similar to a pure function in mathematics,y = f(x). (No way to store information fromone invocation to the next. No sideeffects)• State Elements: circuits that storeinformation.CS61C L14 Introduction to Synchronous Digital Systems (1 6) Beamer, Summer 2007 © UCBCircuits with STATE (e.g., register)CS61C L14 Introduction to Synchronous Digital Systems (1 7) Beamer, Summer 2007 © UCBPeer InstructionA. SW can peek at HW (past ISA abstractionboundary) for optimizationsB. SW can depend on particular HWimplementation of ISAC. Timing diagrams serve as a critical debuggingtool in the EE toolkit ABC1: FFF2: FFT3: FTF4: FTT5: TFF6: TFT7: TTF8: TTTCS61C L14 Introduction to Synchronous Digital Systems (1 8) Beamer, Summer 2007 © UCBAnd in semi conclusion…• ISA is very important abstraction layer• Contract between HW and SW• Basic building blocks are logic gates• Clocks control pulse of our circuits• Voltages are analog, quantized to 0/1• Circuit delays are fact of life• Two types• Stateless Combinational Logic (&,|,~)• State circuits (e.g., registers)CS61C L14 Introduction to Synchronous Digital Systems (1 9) Beamer, Summer 2007 © UCBAdministrivia• Proj2 due Friday• Midterm 7-10p on Monday in 10 Evans• Midterm Review 11-2 on Friday,probably in 10 or 60 Evans• Scott is not holding OH on Monday,but is holding extra OH on Friday 3-5CS61C L14 Introduction to Synchronous Digital Systems (2 0) Beamer, Summer 2007 © UCBAccumulator ExampleWant: S=0; for (i=0;i<n;i++) S = S + XiWhy do we need to control the flow of information?Assume:• Each X value is applied in succession, one per cycle.• After n cycles the


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