inst eecs berkeley edu cs61c CS61C Machine Structures Review C program foo c Compiler Lecture 14 Introduction to Synchronous Digital Systems Assembly program foo s Assembler 2007 7 18 Object mach lang module foo o Scott Beamer Instructor Linker lib o Executable mach lang pgm a out Loader Memory CS61C L14 Introduction to Synchronous Digital Systems 1 Beamer Summer 2007 UCB Compiler Software Hardware Assembler 61C Operating System MacOS X Processor Memory I O system Instruction Set Architecture Digital Design Circuit Design transistors Coordination of many levels of abstraction We ll investigate lower abstraction layers contract between HW SW Beamer Summer 2007 UCB Synchronous Digital Systems int v int k int temp temp v k v k v k 1 v k 1 temp C compiler swap sll add lw lw sw sw jr 2 5 2 2 4 2 15 0 2 16 4 2 16 0 2 15 4 2 31 assembler Machine object code for MIPS 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 CS61C L14 Introduction to Synchronous Digital Systems 4 Beamer Summer 2007 UCB Logic Design The hardware of a processor such as the MIPS is an example of a Synchronous Digital System Synchronous Means all operations are coordinated by a central clock It keeps the heartbeat of the system Digital Mean all values are represented by discrete values Electrical signals are treated as 1 s and 0 s and grouped together to form words CS61C L14 Introduction to Synchronous Digital Systems 5 swap Assembly language program for MIPS Datapath Control CS61C L14 Introduction to Synchronous Digital Systems 3 Beamer Summer 2007 UCB Below the Program High level language program in C What are Machine Structures Application Netscape CS61C L14 Introduction to Synchronous Digital Systems 2 Beamer Summer 2007 UCB Next 2 weeks we ll study how a modern processor is built starting with basic elements as building blocks Why study hardware design Understand capabilities and limitations of hardware in general and processors in particular What processors can do fast and what they can t do fast avoid slow things if you want your code to run fast Background for more detailed hardware courses CS 150 CS 152 There is just so much you can do with processors At some point you may need to design your own custom hardware CS61C L14 Introduction to Synchronous Digital Systems 6 Beamer Summer 2007 UCB Logic Gates Basic building blocks are logic gates Physical Hardware In the beginning did ad hoc designs and then saw patterns repeated gave names Can build gates with transistors and resistors Then found theoretical basis for design Can represent and reason about gates with truth tables and Boolean algebra Assume know some truth tables and Boolean algebra from a math or circuits course Let s look closer Section B 2 in the textbook has a review CS61C L14 Introduction to Synchronous Digital Systems 7 Beamer Summer 2007 UCB Transistors 101 n type NMOSFET p type PMOSFET D D Beamer Summer 2007 UCB G G S n type S p type Chips is composed of nothing but transistors and wires Small groups of transistors form useful building blocks 1 voltage source a 0 0 1 1 For n type p type opposite If voltage not enough between G S transistor turns off cut off and Drain Source NOT connected If the G S voltage is high enough transistor turns on saturation and Drain Source ARE connected www wikipedia org wiki Mosfet Side view CS61C L14 Introduction to Synchronous Digital Systems 9 Beamer Summer 2007 UCB Signals and Waveforms Clocks CS61C L14 Introduction to Synchronous Digital Systems 11 PowerPC Transistor Circuit Rep vs Block diagram MOSFET Metal Oxide Semiconductor Field Effect Transistor Come in two types CS61C L14 Introduction to Synchronous Digital Systems 8 b 0 1 0 1 c 1 1 1 0 0 ground Block are organized in a hierarchy to build higher level blocks ex adders CS61C L14 Introduction to Synchronous Digital Systems 10 Beamer Summer 2007 UCB Signals and Waveforms Adders Beamer Summer 2007 UCB CS61C L14 Introduction to Synchronous Digital Systems 12 Beamer Summer 2007 UCB Signals and Waveforms Grouping Signals and Waveforms Circuit Delay Bus more than one signal treated as a unit CS61C L14 Introduction to Synchronous Digital Systems 13 Beamer Summer 2007 UCB Type of Circuits CS61C L14 Introduction to Synchronous Digital Systems 14 Beamer Summer 2007 UCB Circuits with STATE e g register Synchronous Digital Systems are made up of two basic types of circuits Combinational Logic CL circuits Our previous adder circuit is an example Output is a function of the inputs only Similar to a pure function in mathematics y f x No way to store information from one invocation to the next No side effects State Elements circuits that store information CS61C L14 Introduction to Synchronous Digital Systems 15 Beamer Summer 2007 UCB Peer Instruction CS61C L14 Introduction to Synchronous Digital Systems 16 Beamer Summer 2007 UCB And in semi conclusion ISA is very important abstraction layer Contract between HW and SW Basic building blocks are logic gates Clocks control pulse of our circuits A B C SW can peek at HW past ISA abstraction boundary for optimizations 1 2 SW can depend on particular HW 3 implementation of ISA 4 Timing diagrams serve as a critical debugging 5 6 tool in the EE toolkit 7 8 CS61C L14 Introduction to Synchronous Digital Systems 17 ABC FFF FFT FTF FTT TFF TFT TTF TTT Beamer Summer 2007 UCB Voltages are analog quantized to 0 1 Circuit delays are fact of life Two types Stateless Combinational Logic State circuits e g registers CS61C L14 Introduction to Synchronous Digital Systems 18 Beamer Summer 2007 UCB Administrivia Accumulator Example Why do we need to control the flow of information Proj2 due Friday Midterm 7 10p on Monday in 10 Evans Midterm Review 11 2 on Friday probably in 10 or 60 Evans S 0 for i 0 i n i S S Xi Assume Want Scott is not holding OH on Monday but is holding extra OH on Friday 3 5 Each X value is applied in succession one per cycle After n cycles the sum is present on S CS61C L14 Introduction to Synchronous Digital Systems 19 Beamer Summer 2007 UCB First try Does this work CS61C L14 Introduction to Synchronous Digital Systems 20 Beamer Summer 2007 UCB Second try How about this Feedback Nope Reason 1 What is there to control the next iteration of the for loop Reason 2 How do we say S 0 Rough timing Register is used to hold up the transfer of data to adder CS61C L14 Introduction to Synchronous Digital Systems 21 Beamer Summer 2007 UCB Register Details What s inside CS61C L14 Introduction to Synchronous
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