inst eecs berkeley edu cs61c su05 CS61C Machine Structures Lecture 6 Intro to MIPS 2005 06 28 Andy Carle CS 61C L06 MIPS Intro 1 A Carle Summer 2005 UCB Review Several techniques for managing heap w malloc free best first next fit slab buddy 2 types of memory fragmentation internal external all suffer from some kind of frag Each technique has strengths and weaknesses none is definitively best Automatic memory management relieves programmer from managing memory All require help from language and compiler Reference Count not for circular structures Mark and Sweep complicated and slow works Copying move active objects back and forth CS 61C L06 MIPS Intro 2 A Carle Summer 2005 UCB Buddy System Review Legend FREE ALLOCATED SPLIT 128 0 64 00 32 0010 16 00000010 000 001 010 011 100 101 110 111 Initial State Free 001 Free 000 Free 111 Malloc 16 1 CS 61C L06 MIPS Intro 3 Kudos to Kurt Meinz for these fine slides A Carle Summer 2005 UCB Buddy System Legend FREE ALLOCATED SPLIT 128 0 64 00 32 0010 16 01000010 000 001 010 011 100 101 110 111 Initial State Free 001 Free 000 Free 111 Malloc 16 1 CS 61C L06 MIPS Intro 4 A Carle Summer 2005 UCB Buddy System Legend FREE ALLOCATED SPLIT 128 0 64 00 32 0010 16 11000010 000 001 010 011 100 101 110 111 Initial State Free 001 Free 000 Free 111 Malloc 16 1 CS 61C L06 MIPS Intro 5 A Carle Summer 2005 UCB Buddy System Legend FREE ALLOCATED SPLIT 128 0 64 00 32 1010 16 00000010 000 001 010 011 100 101 110 111 Initial State Free 001 Free 000 Free 111 Malloc 16 2 CS 61C L06 MIPS Intro 6 A Carle Summer 2005 UCB Buddy System Legend FREE ALLOCATED SPLIT 128 0 64 00 32 1010 16 00000011 000 001 010 011 100 101 110 111 Initial State Free 001 Free 000 Free 111 Malloc 16 1 CS 61C L06 MIPS Intro 7 A Carle Summer 2005 UCB Buddy System Legend FREE ALLOCATED SPLIT 128 0 64 00 32 1011 16 00000000 000 001 010 011 100 101 110 111 Initial State Free 001 Free 000 Free 111 Malloc 16 2 CS 61C L06 MIPS Intro 8 A Carle Summer 2005 UCB Buddy System Legend FREE ALLOCATED SPLIT 128 0 64 01 32 1000 16 00000000 000 001 010 011 100 101 110 111 Initial State Free 001 Free 000 Free 111 Malloc 16 3 CS 61C L06 MIPS Intro 9 A Carle Summer 2005 UCB Buddy System Legend FREE ALLOCATED SPLIT 128 0 64 01 32 0000 16 11000000 000 001 010 011 100 101 110 111 Initial State Free 001 Free 000 Free 111 Malloc 16 1 CS 61C L06 MIPS Intro 10 A Carle Summer 2005 UCB Buddy System Legend FREE ALLOCATED SPLIT 128 0 64 01 32 0000 16 01000000 000 001 010 011 100 101 110 111 Initial State Free 001 Free 000 Free 111 Malloc 16 2 CS 61C L06 MIPS Intro 11 A Carle Summer 2005 UCB New Topic MIPS Assembly Language CS 61C L06 MIPS Intro 12 A Carle Summer 2005 UCB Assembly Language Basic job of a CPU execute lots of instructions Instructions are the primitive operations that the CPU may execute Different CPUs implement different sets of instructions The set of instructions a particular CPU implements is an Instruction Set Architecture ISA Examples Intel 80x86 Pentium 4 IBM Motorola PowerPC Macintosh MIPS Intel IA64 CS 61C L06 MIPS Intro 13 A Carle Summer 2005 UCB Instruction Set Architectures Early trend was to add more and more instructions to new CPUs to do elaborate operations VAX architecture had an instruction to multiply polynomials RISC philosophy Cocke IBM Patterson Hennessy 1980s Reduced Instruction Set Computing Keep the instruction set small and simple makes it easier to build fast hardware Let software do complicated operations by composing simpler ones CS 61C L06 MIPS Intro 14 A Carle Summer 2005 UCB ISA Design Must Run Fast In Hardware Eliminate sources of complexity Software Hardware Symbolic Lookup fixed var names Strong typing No Typing Nested expressions Fixed format Inst Many operators CS 61C L06 MIPS Intro 15 small set of insts A Carle Summer 2005 UCB MIPS Architecture MIPS semiconductor company that built one of the first commercial RISC architectures We will study the MIPS architecture in some detail in this class also used in upper division courses CS 152 162 164 Why MIPS instead of Intel 80x86 MIPS is simple elegant Don t want to get bogged down in gritty details MIPS widely used in embedded apps x86 little used in embedded and more embedded computers than PCs CS 61C L06 MIPS Intro 16 A Carle Summer 2005 UCB Assembly Variables Registers 1 4 Unlike HLL like C or Java assembly cannot use variables Why not Keep Hardware Simple Assembly Operands are registers limited number of special locations built directly into the hardware operations can only be performed on these Benefit Since registers are directly in hardware they are very fast faster than 1 billionth of a second CS 61C L06 MIPS Intro 17 A Carle Summer 2005 UCB Assembly Variables Registers 2 4 Drawback Since registers are in hardware there are a predetermined number of them Solution MIPS code must be very carefully put together to efficiently use registers 32 registers in MIPS Why just 32 Smaller is faster Each MIPS register is 32 bits wide Groups of 32 bits called a word in MIPS CS 61C L06 MIPS Intro 18 A Carle Summer 2005 UCB Assembly Variables Registers 3 4 Registers are numbered from 0 to 31 Each register can be referred to by number or name Number references 0 1 2 30 31 CS 61C L06 MIPS Intro 19 A Carle Summer 2005 UCB Assembly Variables Registers 4 4 By convention each register also has a name to make it easier to code For now 16 23 s0 s7 correspond to C variables 8 15 t0 t7 correspond to temporary variables Later will explain other 16 register names In general use names to make your code more readable CS 61C L06 MIPS Intro 20 A Carle Summer 2005 UCB C Java variables vs registers In C and most High Level Languages variables declared first and given a type Example int fahr celsius char a b c d e Each variable can ONLY represent a value of the type it was declared as cannot mix and match int and char variables In Assembly Language the registers have no type operation determines how register contents are treated CS 61C L06 MIPS Intro 21 A Carle Summer 2005 UCB Comments in Assembly Another way to make your code more readable comments Hash is used for MIPS comments anything from hash mark to end of line is a comment and will be ignored Note Different from C C comments have format comment so they can span many lines CS 61C L06 MIPS Intro 22 A Carle Summer 2005 UCB Assembly Instructions In assembly language each statement called an Instruction executes exactly one of a short list of simple commands …
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