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Berkeley COMPSCI 61C - Lecture Notes

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CS61C L12 MIPS Instruction Rep III, Running a Program I (1)Beamer, Summer 2007 © UCBScott Beamer, Instructorinst.eecs.berkeley.edu/~cs61cCS61C : Machine Structures Lecture #12 – MIPS Instruction Rep III,Running a Program Iaka Compiling, Assembling, Linking, Loading (CALL)2007-7-16www.sfgate.comNew DirectionServiceAnnouncedCS61C L12 MIPS Instruction Rep III, Running a Program I (2)Beamer, Summer 2007 © UCBReview of Floating Point• Reserve exponents, significands:Exponent Significand Object0 0 00 nonzero Denorm1-254 anything +/- fl. pt. #255 0 +/- ∞255 nonzero NaN• Integer mult, div uses hi, lo regs•mfhi and mflo copies out.• Four rounding modes (to even default)• MIPS FL ops complicated, expensiveCS61C L12 MIPS Instruction Rep III, Running a Program I (3)Beamer, Summer 2007 © UCBClarification Unbiased Rounding• Round to (nearest) even (default)• Normal rounding, almost: 2.5 ⇒ 2, 3.5 ⇒ 4• Insures fairness on calculation• Half the time we round up, other half down• Decimal gives a good initial intuition, butremember computers use binary• Steps to Use it (in binary)• Determine place to be rounded to• Figure out the two possible outcomes(its binary so 1 or 0 in last place)• If one outcome is closer to current numberthan other, pick that outcome• If both outcomes are equidistant pick theoutcome that ends in 0CS61C L12 MIPS Instruction Rep III, Running a Program I (4)Beamer, Summer 2007 © UCBDecoding Machine Language• How do we convert 1s and 0s to C code?Machine language ⇒ C?• For each 32 bits:• Look at opcode: 0 means R-Format, 2 or 3mean J-Format, otherwise I-Format.• Use instruction type to determine whichfields exist.• Write out MIPS assembly code, convertingeach field to name, register number/name,or decimal/hex number.• Logically convert this MIPS code into validC code. Always possible? Unique?CS61C L12 MIPS Instruction Rep III, Running a Program I (5)Beamer, Summer 2007 © UCBDecoding Example (1/7)• Here are six machine languageinstructions in hexadecimal:00001025hex0005402Ahex11000003hex00441020hex20A5FFFFhex08100001hex• Let the first instruction be at address4,194,304ten (0x00400000hex).• Next step: convert hex to binaryCS61C L12 MIPS Instruction Rep III, Running a Program I (6)Beamer, Summer 2007 © UCBDecoding Example (2/7)• The six machine language instructions inbinary: 000000000000000000010000001001010000000000000101010000000010101000010001000000000000000000000011000000000100010000010000001000000010000010100101111111111111111100001000000100000000000000000001• Next step: identify opcode and format1, 4-31 rs rt immediate0 rs rt rd functshamtRIJtarget address2 or 3CS61C L12 MIPS Instruction Rep III, Running a Program I (7)Beamer, Summer 2007 © UCBDecoding Example (3/7)• Select the opcode (first 6 bits)to determine the format: 000000000000000000010000001001010000000000000101010000000010101000010001000000000000000000000011000000000100010000010000001000000010000010100101111111111111111100001000000100000000000000000001• Look at opcode:0 means R-Format,2 or 3 mean J-Format,otherwise I-Format.• "Next step: separation of fieldsRRIRIJFormat:CS61C L12 MIPS Instruction Rep III, Running a Program I (8)Beamer, Summer 2007 © UCBDecoding Example (4/7)• Fields separated based on format/opcode:0 0 0 2 3700 0 5 8 4204 8 0 +30 2 4 2 3208 5 5 -12 1,048,577• Next step: translate (“disassemble”) toMIPS assembly instructionsRRIRIJFormat:CS61C L12 MIPS Instruction Rep III, Running a Program I (9)Beamer, Summer 2007 © UCBDecoding Example (5/7)• MIPS Assembly (Part 1):Address: Assembly instructions:0x00400000 or $2,$0,$00x00400004 slt $8,$0,$50x00400008 beq $8,$0,30x0040000c add $2,$2,$40x00400010 addi $5,$5,-10x00400014 j 0x100001• Better solution: translate to moremeaningful MIPS instructions (fix thebranch/jump and add labels, registers)CS61C L12 MIPS Instruction Rep III, Running a Program I (10)Beamer, Summer 2007 © UCBDecoding Example (6/7)• MIPS Assembly (Part 2):or $v0,$0,$0Loop: slt $t0,$0,$a1beq $t0,$0,Exitadd $v0,$v0,$a0addi $a1,$a1,-1j LoopExit:• Next step: translate to C code(be creative!)CS61C L12 MIPS Instruction Rep III, Running a Program I (11)Beamer, Summer 2007 © UCBDecoding Example (7/7)• After C code (Mapping below)$v0: product$a0: multiplicand$a1: multiplierproduct = 0;while (multiplier > 0) {product += multiplicand;multiplier -= 1;}Before Hex:00001025hex0005402Ahex11000003hex00441020hex20A5FFFFhex 08100001hexDemonstrated Big 61CIdea: Instructions arejust numbers, code istreated like data or $v0,$0,$0Loop: slt $t0,$0,$a1 beq $t0,$0,Exit add $v0,$v0,$a0 addi $a1,$a1,-1 j LoopExit:CS61C L12 MIPS Instruction Rep III, Running a Program I (12)Beamer, Summer 2007 © UCBAdministrivia…Midterm in 7 days!• Project 2 due Friday @ 11:59pm• Midterm 7/23 @ 7-10pm 60 Evans• Bring…• NO backpacks, cells, calculators,pagers, PDAs• 2 writing implements (we’ll providewrite-in exam booklets) – pencils ok!• One handwritten (both sides) 8.5”x11”paper• One green sheet (or copy of it)• Review Session Friday @ …CS61C L12 MIPS Instruction Rep III, Running a Program I (13)Beamer, Summer 2007 © UCBReview from before: lui• So how does lui help us?• Example:addi $t0,$t0, 0xABABCDCDbecomes:lui $at, 0xABABori $at, $at, 0xCDCDadd $t0,$t0,$at• Now each I-format instruction has only a 16-bit immediate.• Wouldn’t it be nice if the assemblerwould this for us automatically?- If number too big, then just automaticallyreplace addi with lui, ori, addCS61C L12 MIPS Instruction Rep III, Running a Program I (14)Beamer, Summer 2007 © UCBTrue Assembly Language (1/3)• Pseudoinstruction: A MIPS instructionthat doesn’t turn directly into a machinelanguage instruction, but into other MIPSinstructions• What happens with pseudoinstructions?• They’re broken up by the assembler intoseveral “real” MIPS instructions.• But what is a “real” MIPS instruction?Answer in a few slides• First some examplesCS61C L12 MIPS Instruction Rep III, Running a Program I (15)Beamer, Summer 2007 © UCBExample Pseudoinstructions• Register Movemove reg2,reg1Expands to:add reg2,$zero,reg1• Load Immediateli reg,valueIf value fits in 16 bits:addi reg,$zero,valueelse:lui reg,upper 16 bits of valueori reg,$zero,lower 16 bitsCS61C L12 MIPS Instruction Rep III, Running a Program I (16)Beamer, Summer 2007


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Berkeley COMPSCI 61C - Lecture Notes

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