inst eecs berkeley edu cs61c CS61C Machine Structures Lecture 12 MIPS Instruction Rep III Running a Program I aka Compiling Assembling Linking Loading CALL 2007 7 16 Scott Beamer Instructor New Direction Service Announced www sfgate com CS61C L12 MIPS Instruction Rep III Running a Program I 1 Beamer Summer 2007 UCB Review of Floating Point Reserve exponents significands Exponent 0 0 1 254 255 255 Significand 0 nonzero anything 0 nonzero Object 0 Denorm fl pt NaN Integer mult div uses hi lo regs mfhi and mflo copies out Four rounding modes to even default MIPS FL ops complicated expensive CS61C L12 MIPS Instruction Rep III Running a Program I 2 Beamer Summer 2007 UCB Clarification Unbiased Rounding Round to nearest even default Normal rounding almost 2 5 2 3 5 4 Insures fairness on calculation Half the time we round up other half down Decimal gives a good initial intuition but remember computers use binary Steps to Use it in binary Determine place to be rounded to Figure out the two possible outcomes its binary so 1 or 0 in last place If one outcome is closer to current number than other pick that outcome If both outcomes are equidistant pick the outcome that ends in 0 CS61C L12 MIPS Instruction Rep III Running a Program I 3 Beamer Summer 2007 UCB Decoding Machine Language How do we convert 1s and 0s to C code Machine language C For each 32 bits Look at opcode 0 means R Format 2 or 3 mean J Format otherwise I Format Use instruction type to determine which fields exist Write out MIPS assembly code converting each field to name register number name or decimal hex number Logically convert this MIPS code into valid C code Always possible Unique CS61C L12 MIPS Instruction Rep III Running a Program I 4 Beamer Summer 2007 UCB Decoding Example 1 7 Here are six machine language instructions in hexadecimal 00001025hex 0005402Ahex 11000003hex 00441020hex 20A5FFFFhex 08100001hex Let the first instruction be at address 4 194 304ten 0x00400000hex Next step convert hex to binary CS61C L12 MIPS Instruction Rep III Running a Program I 5 Beamer Summer 2007 UCB Decoding Example 2 7 The six machine language instructions in binary 00000000000000000001000000100101 00000000000001010100000000101010 00010001000000000000000000000011 00000000010001000001000000100000 00100000101001011111111111111111 00001000000100000000000000000001 Next step identify opcode and format R 0 I 1 4 31 J 2 or 3 rs rs rt rd shamt funct rt immediate target address CS61C L12 MIPS Instruction Rep III Running a Program I 6 Beamer Summer 2007 UCB Decoding Example 3 7 Select the opcode first 6 bits to determine the format Format R R I R I J 00000000000000000001000000100101 00000000000001010100000000101010 00010001000000000000000000000011 00000000010001000001000000100000 00100000101001011111111111111111 00001000000100000000000000000001 Look at opcode 0 means R Format 2 or 3 mean J Format otherwise I Format Next step separation of fields CS61C L12 MIPS Instruction Rep III Running a Program I 7 Beamer Summer 2007 UCB Decoding Example 4 7 Fields separated based on format opcode Format R R I R I J 0 0 4 0 8 2 0 0 8 2 5 0 5 0 4 5 2 8 2 0 0 3 0 1 37 42 32 1 048 577 Next step translate disassemble to MIPS assembly instructions CS61C L12 MIPS Instruction Rep III Running a Program I 8 Beamer Summer 2007 UCB Decoding Example 5 7 MIPS Assembly Part 1 Address Assembly instructions 0x00400000 0x00400004 0x00400008 0x0040000c 0x00400010 0x00400014 or slt beq add addi j 2 0 0 8 0 5 8 0 3 2 2 4 5 5 1 0x100001 Better solution translate to more meaningful MIPS instructions fix the branch jump and add labels registers CS61C L12 MIPS Instruction Rep III Running a Program I 9 Beamer Summer 2007 UCB Decoding Example 6 7 MIPS Assembly Part 2 Loop Exit or slt beq add addi j v0 0 0 t0 0 a1 t0 0 Exit v0 v0 a0 a1 a1 1 Loop Next step translate to C code be creative CS61C L12 MIPS Instruction Rep III Running a Program I 10 Beamer Summer 2007 UCB Decoding Example 7 7 Before Hex After C code Mapping below 00001025hex 0005402Ahex 11000003hex 00441020hex 20A5FFFFhex 08100001hex or Loop slt beq add addi j Exit v0 product a0 multiplicand a1 multiplier product 0 while multiplier 0 product multiplicand multiplier 1 v0 0 0 t0 0 a1 t0 0 Exit v0 v0 a0 a1 a1 1 Loop CS61C L12 MIPS Instruction Rep III Running a Program I 11 Demonstrated Big 61C Idea Instructions are just numbers code is treated like data Beamer Summer 2007 UCB Administrivia Midterm in 7 days Project 2 due Friday 11 59pm Midterm 7 23 7 10pm 60 Evans Bring NO backpacks cells calculators pagers PDAs 2 writing implements we ll provide write in exam booklets pencils ok One handwritten both sides 8 5 x11 paper One green sheet or copy of it Review Session Friday CS61C L12 MIPS Instruction Rep III Running a Program I 12 Beamer Summer 2007 UCB Review from before lui So how does lui help us Example addi becomes lui ori add t0 t0 0xABABCDCD at 0xABAB at at 0xCDCD t0 t0 at Now each I format instruction has only a 16bit immediate Wouldn t it be nice if the assembler would this for us automatically If number too big then just automatically replace addi with lui ori add CS61C L12 MIPS Instruction Rep III Running a Program I 13 Beamer Summer 2007 UCB True Assembly Language 1 3 Pseudoinstruction A MIPS instruction that doesn t turn directly into a machine language instruction but into other MIPS instructions What happens with pseudoinstructions They re broken up by the assembler into several real MIPS instructions But what is a real MIPS instruction Answer in a few slides First some examples CS61C L12 MIPS Instruction Rep III Running a Program I 14 Beamer Summer 2007 UCB Example Pseudoinstructions Register Move move reg2 reg1 Expands to add reg2 zero reg1 Load Immediate li reg value If value fits in 16 bits addi reg zero value else lui reg upper 16 bits of value ori reg zero lower 16 bits CS61C L12 MIPS Instruction Rep III Running a Program I 15 Beamer Summer 2007 UCB True Assembly Language 2 3 Problem When breaking up a pseudoinstruction the assembler may need to use an extra reg If it uses any regular register it ll overwrite whatever the program has put into it Solution Reserve a register 1 called at for assembler temporary that assembler will use to break up pseudo instructions Since the assembler may use this at any time it s not safe to code with it CS61C L12 MIPS Instruction Rep III Running a Program I 16 Beamer Summer 2007 UCB Example Pseudoinstructions Rotate Right Instruction ror reg Expands to srl at sll reg or reg
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