inst eecs berkeley edu cs61c UCB CS61C Machine Structures Lecture 9 Introduction to MIPS Data Transfer Decisions I Lecturer SOE Dan Garcia 2010 02 08 Hi to Jon Cappella from Denver CO Review In MIPS Assembly Language Registers replace variables One Instruction simple operation per line Simpler is Better Smaller is Faster New Instructions add addi sub Since 2001 the TIOBE programming community index has been charting the populatiry of programming languages they use search engines Note it isn t calculating the best or most lines of code New Registers C Variables s0 s7 Temporary Variables t0 t7 Zero zero www tiobe com index php content paperinfo tpci Garcia Spring 2010 UCB CS61C L09 Introduction to MIPS Data Transfer and Decisions 2 Assembly Operands Memory Anatomy 5 components of any Computer C variables map onto registers what about large data structures like arrays 1 of 5 components of a computer Registers are in the datapath of the processor if operands are in memory we must transfer them to the processor to operate on them and then transfer back to memory when done Computer memory contains such data structures But MIPS arithmetic instructions only operate on registers never directly on memory Data transfer instructions transfer data between registers and memory Processor Memory Control brain Datapath Registers Devices Input Output Memory to register Register to memory CS61C L09 Introduction to MIPS Data Transfer and Decisions 3 These are data transfer instructions Garcia Spring 2010 UCB Data Transfer Memory to Reg 1 4 Garcia Spring 2010 UCB Data Transfer Memory to Reg 2 4 To transfer a word of data To specify a memory address to copy from we need to specify two things specify two things Register specify this by 0 31 or A register containing a pointer to memory symbolic name s0 t0 Memory address more difficult A numerical offset in bytes Think of memory as a single one dimensional array so we can address it simply by supplying a pointer to a memory address Other times we want to be able to offset from this pointer Remember Load FROM memory CS61C L09 Introduction to MIPS Data Transfer and Decisions 5 CS61C L09 Introduction to MIPS Data Transfer and Decisions 4 Garcia Spring 2010 UCB The desired memory address is the sum of these two values Example 8 t0 specifies the memory address pointed to by the value in t0 plus 8 bytes CS61C L09 Introduction to MIPS Data Transfer and Decisions 6 Garcia Spring 2010 UCB Data Transfer Memory to Reg 3 4 Data Transfer Memory to Reg 4 4 Load Instruction Syntax Data flow 1 2 3 4 where 1 operation name 2 register that will receive value 3 numerical offset in bytes 4 register containing pointer to memory Example Notes MIPS Instruction Name lw meaning Load Word so 32 bits or one word are loaded at a time CS61C L09 Introduction to MIPS Data Transfer and Decisions 7 Garcia Spring 2010 UCB Data Transfer Reg to Memory s0 is called the base register 12 is called the offset offset is generally used in accessing elements of array or structure base reg points to beginning of array or structure note offset must be a constant known at assembly time Garcia Spring 2010 UCB CS61C L09 Introduction to MIPS Data Transfer and Decisions 8 Pointers v Values Also want to store from register into memory Store instruction syntax is identical to Load s MIPS Instruction Name sw meaning Store Word so 32 bits or one word is stored at a time Data flow Example lw t0 12 s0 This instruction will take the pointer in s0 add 12 bytes to it and then load the value from the memory pointed to by this calculated sum into register t0 sw t0 12 s0 This instruction will take the pointer in s0 add 12 bytes to it and then store the value from register t0 into that memory address Key Concept A register can hold any 32 bit value That value can be a signed int an unsigned int a pointer memory addr and so on E g If you write add t2 t1 t0 then t0 and t1 better contain values that can be added E g If you write lw t2 0 t0 then t0 better contain a pointer Don t mix these up Remember Store INTO memory CS61C L09 Introduction to MIPS Data Transfer and Decisions 9 Garcia Spring 2010 UCB Addressing Byte vs Word Compilation with Memory Every word in memory has an address similar to an index in an array numbers elements of an array Called the address of a word Computers needed to access 8 bit bytes as well as words 4 bytes word Today machines address memory as bytes i e Byte Addressed hence 32 bit 4 byte word addresses differ by 4 Memory 0 Memory 4 Memory 8 CS61C L09 Introduction to MIPS Data Transfer and Decisions 11 What offset in lw to select A 5 in C 4x5 20 to select A 5 byte v word Compile by hand using registers Early computers numbered words like C Memory 0 Memory 1 Memory 2 Garcia Spring 2010 UCB CS61C L09 Introduction to MIPS Data Transfer and Decisions 10 Garcia Spring 2010 UCB g h A 5 g s1 h s2 s3 base address of A 1st transfer from memory to register lw t0 20 s3 t0 gets A 5 Add 20 to s3 to select A 5 put into t0 Next add it to h and place in g add s1 s2 t0 CS61C L09 Introduction to MIPS Data Transfer and Decisions 12 s1 h A 5 Garcia Spring 2010 UCB Notes about Memory More Notes about Memory Alignment MIPS requires that all words start at byte Pitfall Forgetting that sequential word addresses that are multiples of 4 bytes addresses in machines with byte addressing do not differ by 1 Many an assembly language programmer has toiled over errors made by assuming that the address of the next word can be found by incrementing the address in a register by 1 instead of by the word size in bytes Also remember that for both lw and sw the sum of the base address and the offset must be a multiple of 4 to be word aligned CS61C L09 Introduction to MIPS Data Transfer and Decisions 13 Garcia Spring 2010 UCB 3 2 1 Aligned Not Aligned 0 Last hex digit of address is 0 4 8 or Chex 1 5 9 or Dhex 2 6 A or Ehex 3 7 B or Fhex Called Alignment objects fall on address that is multiple of their size CS61C L09 Introduction to MIPS Data Transfer and Decisions 14 Garcia Spring 2010 UCB Administrivia Role of Registers vs Memory What if more variables than registers Compiler tries to keep most frequently used variable in registers Less common variables in memory spilling Project 1 due on Saturday Other things to announce Why not keep all variables in memory Smaller is faster registers are faster than memory Registers more versatile MIPS arithmetic instructions can read 2 operate on them and write 1 per instruction MIPS data
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