Slide 1Review61C Levels of Representation (abstractions)Overview – Instruction RepresentationBig Idea: Stored-Program ConceptConsequence #1: Everything AddressedConsequence #2: Binary CompatibilityInstructions as Numbers (1/2)Instructions as Numbers (2/2)Instruction FormatsR-Format Instructions (1/5)R-Format Instructions (2/5)R-Format Instructions (3/5)R-Format Instructions (4/5)R-Format Instructions (5/5)R-Format Example (1/2)R-Format Example (2/2)AdministriviaI-Format Instructions (1/4)I-Format Instructions (2/4)I-Format Instructions (3/4)I-Format Instructions (4/4)I-Format Example (1/2)I-Format Example (2/2)Peer InstructionIn conclusion…inst.eecs.berkeley.edu/~cs61c UCB CS61C : Machine Structures Lecture 13MIPS Instruction Representation I 2008-02-22AFTER MOORE’S LAW?The National Science Foundation (NSF) requested $20 million to start the “Science and Engineering Beyond Moore’s Law” effort, to fund academic research in carbon nanotubes, quantum computing, massively multicore computers, etc. (that could improve and replace current transistor technology). That’s great for Cal – leaders in these! Lecturer SOE Dan Garciawww.pcworld.com/article/id,142561-page,1/article.htmlCS61C L12 MIPS Instruction Representation I (2)Garcia, Spring 2008 © UCBRegister Conventions: Each register has a purpose and limits to its usage. Learn these and follow them, even if you’re writing all the code yourself.Logical and Shift InstructionsOperate on bits individually, unlike arithmetic, which operate on entire word.Use to isolate fields, either by masking or by shifting back and forth.Use shift left logical, sll,for multiplication by powers of 2Use shift right arithmetic, sra,for division by powers of 2.New Instructions:and, andi, or, ori, sll, srl, sraReviewCS61C L12 MIPS Instruction Representation I (3)Garcia, Spring 2008 © UCBHigh Level Language Program (e.g., C)Assembly Language Program (e.g.,MIPS)Machine Language Program (MIPS)Hardware Architecture Description (e.g., block diagrams) CompilerAssemblerMachine Interpretationtemp = v[k];v[k] = v[k+1];v[k+1] = temp;lw $t0, 0($s2)lw $t1, 4($s2)sw $t1, 0($s2)sw $t0, 4($s2)0000 1001 1100 0110 1010 1111 0101 10001010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 Logic Circuit Description (Circuit Schematic Diagrams)Architecture ImplementationRegister FileALU61C Levels of Representation (abstractions)CS61C L12 MIPS Instruction Representation I (4)Garcia, Spring 2008 © UCBOverview – Instruction RepresentationBig idea: stored program consequences of stored programInstructions as numbersInstruction encoding MIPS instruction format for Add instructionsMIPS instruction format for Immediate, Data transfer instructionsCS61C L12 MIPS Instruction Representation I (5)Garcia, Spring 2008 © UCBBig Idea: Stored-Program ConceptComputers built on 2 key principles:Instructions are represented as bit patterns - can think of these as numbers.Therefore, entire programs can be stored in memory to be read or written just like data.Simplifies SW/HW of computer systems: Memory technology for data also used for programsCS61C L12 MIPS Instruction Representation I (6)Garcia, Spring 2008 © UCBConsequence #1: Everything AddressedSince all instructions and data are stored in memory, everything has a memory address: instructions, data wordsboth branches and jumps use theseC pointers are just memory addresses: they can point to anything in memoryUnconstrained use of addresses can lead to nasty bugs; up to you in C; limits in JavaOne register keeps address of instruction being executed: “Program Counter” (PC)Basically a pointer to memory: Intel calls it Instruction Address Pointer, a better nameCS61C L12 MIPS Instruction Representation I (7)Garcia, Spring 2008 © UCBConsequence #2: Binary CompatibilityPrograms are distributed in binary formPrograms bound to specific instruction setDifferent version for Macintoshes and PCsNew machines want to run old programs (“binaries”) as well as programs compiled to new instructionsLeads to “backward compatible” instruction set evolving over timeSelection of Intel 8086 in 1981 for 1st IBM PC is major reason latest PCs still use 80x86 instruction set (Pentium 4); could still run program from 1981 PC todayCS61C L12 MIPS Instruction Representation I (8)Garcia, Spring 2008 © UCBInstructions as Numbers (1/2)Currently all data we work with is in words (32-bit blocks):Each register is a word.lw and sw both access memory one word at a time.So how do we represent instructions?Remember: Computer only understands 1s and 0s, so “add $t0,$0,$0” is meaningless.MIPS wants simplicity: since data is in words, make instructions be words tooCS61C L12 MIPS Instruction Representation I (9)Garcia, Spring 2008 © UCBInstructions as Numbers (2/2)One word is 32 bits, so divide instruction word into “fields”.Each field tells processor something about instruction.We could define different fields for each instruction, but MIPS is based on simplicity, so define 3 basic types of instruction formats:R-formatI-formatJ-formatCS61C L12 MIPS Instruction Representation I (10)Garcia, Spring 2008 © UCBInstruction FormatsI-format: used for instructions with immediates, lw and sw (since offset counts as an immediate), and branches (beq and bne), (but not the shift instructions; later)J-format: used for j and jal R-format: used for all other instructionsIt will soon become clear why the instructions have been partitioned in this way.CS61C L12 MIPS Instruction Representation I (11)Garcia, Spring 2008 © UCBR-Format Instructions (1/5)Define “fields” of the following number of bits each: 6 + 5 + 5 + 5 + 5 + 6 = 32For simplicity, each field has a name:Important: On these slides and in book, each field is viewed as a 5- or 6-bit unsigned integer, not as part of a 32-bit integer.Consequence: 5-bit fields can represent any number 0-31, while 6-bit fields can represent any number 0-63.6 5 5 5 65opcode rs rt rd functshamtCS61C L12 MIPS Instruction Representation I (12)Garcia, Spring 2008 © UCBR-Format Instructions (2/5)What do these field integer values tell us?opcode: partially specifies what instruction it is Note: This number is equal to 0 for all R-Format instructions.funct: combined with opcode,
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