CS61C L17 MIPS Instruction Format III (1 ) Spring 2008 © UCBiPhone games!(and general SDK) ⇒Apple is (finally) releasing an iPhoneSoftware Developer Kit on March 6th (?)That means iPhone games that use bothtouch and accelerometer input!TA Matt Johnsoninst.eecs.berkeley.edu/~cs61c-tminst.eecs.berkeley.edu/~cs61cUC Berkeley CS61C : Machine Structures Lecture 17Instruction Representation III 2008-03-03youtube.com/watch?v=hy0ptZisr70CS61C L17 MIPS Instruction Format III (2 ) Spring 2008 © UCBReview• MIPS Machine Language Instruction:32 bits representing a single instruction• Branches use PC-relative addressing,Jumps use absolute addressing.opcode rs rt immediateopcode rs rt rd functshamtRIJ target addressopcodeCS61C L17 MIPS Instruction Format III (3 ) Spring 2008 © UCBOutline• Disassembly• Pseudoinstructions• “True” Assembly Language (TAL) vs.“MIPS” Assembly Language (MAL)CS61C L17 MIPS Instruction Format III (4 ) Spring 2008 © UCBDecoding Machine Language• How do we convert 1s and 0s toassembly language and to C code?Machine language ⇒ assembly ⇒ C?• For each 32 bits:1. Look at opcode to distinquish between R-Format, J-Format, and I-Format.2. Use instruction format to determine whichfields exist.3. Write out MIPS assembly code,converting each field to name, registernumber/name, or decimal/hex number.4. Logically convert this MIPS code intovalid C code. Always possible? Unique?CS61C L17 MIPS Instruction Format III (5 ) Spring 2008 © UCBDecoding Example (1/7)• Here are six machine languageinstructions in hexadecimal:00001025hex0005402Ahex11000003hex00441020hex20A5FFFFhex08100001hex• Let the first instruction be at address4,194,304ten (0x00400000hex).• Next step: convert hex to binaryCS61C L17 MIPS Instruction Format III (6 ) Spring 2008 © UCBDecoding Example (2/7)• The six machine language instructions inbinary: 000000000000000000010000001001010000000000000101010000000010101000010001000000000000000000000011000000000100010000010000001000000010000010100101111111111111111100001000000100000000000000000001• Next step: identify opcode and format1, 4-62 rs rt immediate0 rs rt rd functshamtRIJ target address2 or 3CS61C L17 MIPS Instruction Format III (7 ) Spring 2008 © UCBDecoding Example (3/7)• Select the opcode (first 6 bits)to determine the format: 000000000000000000010000001001010000000000000101010000000010101000010001000000000000000000000011000000000100010000010000001000000010000010100101111111111111111100001000000100000000000000000001• Look at opcode:0 means R-Format,2 or 3 mean J-Format,otherwise I-Format.• !Next step: separation of fieldsRRIRIJFormat:CS61C L17 MIPS Instruction Format III (8 ) Spring 2008 © UCBDecoding Example (4/7)• Fields separated based on format/opcode:0 0 0 2 3700 0 5 8 4204 8 0 +30 2 4 2 3208 5 5 -12 1,048,577• Next step: translate (“disassemble”) toMIPS assembly instructionsRRIRIJFormat:CS61C L17 MIPS Instruction Format III (9 ) Spring 2008 © UCBDecoding Example (5/7)• MIPS Assembly (Part 1):Address: Assembly instructions:0x00400000 or $2,$0,$00x00400004 slt $8,$0,$50x00400008 beq $8,$0,30x0040000c add $2,$2,$40x00400010 addi $5,$5,-10x00400014 j 0x100001• Better solution: translate to moremeaningful MIPS instructions (fix thebranch/jump and add labels, registers)CS61C L17 MIPS Instruction Format III (10) Spring 2008 © UCBDecoding Example (6/7)• MIPS Assembly (Part 2):or $v0,$0,$0Loop: slt $t0,$0,$a1beq $t0,$0,Exitadd $v0,$v0,$a0addi $a1,$a1,-1j LoopExit:• Next step: translate to C code(must be creative!)CS61C L17 MIPS Instruction Format III (11) Spring 2008 © UCBDecoding Example (7/7)• After C code (Mapping below)$v0: product$a0: multiplicand$a1: multiplierproduct = 0;while (multiplier > 0) {product += multiplicand;multiplier -= 1;}Before Hex:00001025hex0005402Ahex11000003hex00441020hex20A5FFFFhex 08100001hexDemonstrated Big 61CIdea: Instructions arejust numbers, code istreated like data or $v0,$0,$0Loop: slt $t0,$0,$a1 beq $t0,$0,Exit add $v0,$v0,$a0 addi $a1,$a1,-1 j LoopExit:CS61C L17 MIPS Instruction Format III (12) Spring 2008 © UCBAdministrivia• Midterm is next week! Day andlocation are still TBA• Old midterms online (link at top of page)• Lectures and reading materials fair game• Fix green sheet errors (if old book)• Review session also TBA• Project 2 is due March 5 at 11:59PM• Thatʼs Wednesday!• There was a file update. See spec page.CS61C L17 MIPS Instruction Format III (13) Spring 2008 © UCBReview from before: lui• So how does lui help us?• Example:addi $t0,$t0, 0xABABCDCDbecomes:lui $at, 0xABABori $at, $at, 0xCDCDadd $t0,$t0,$at• Now each I-format instruction has only a 16-bit immediate.• Wouldnʼt it be nice if the assemblerwould this for us automatically? If number too big, then just automaticallyreplace addi with lui, ori, addCS61C L17 MIPS Instruction Format III (14) Spring 2008 © UCBTrue Assembly Language (1/3)• Pseudoinstruction: A MIPS instructionthat doesnʼ t turn directly into a machinelanguage instruction, but into other MIPSinstructions• What happens with pseudo-instructions?• Theyʼre broken up by the assembler intoseveral “real” MIPS instructions.• Some examples followCS61C L17 MIPS Instruction Format III (15) Spring 2008 © UCBExample Pseudoinstructions• Register Movemove reg2,reg1Expands to:add reg2,$zero,reg1• Load Immediateli reg,valueIf value fits in 16 bits:addi reg,$zero,valueelse:lui reg,upper 16 bits of valueori reg,$zero,lower 16 bitsCS61C L17 MIPS Instruction Format III (16) Spring 2008 © UCBExample Pseudoinstructions• Load Address: How do we get theaddress of an instruction or globalvariable into a register?la reg,labelAgain if value fits in 16 bits:addi reg,$zero,label_valueelse:lui reg,upper 16 bits of valueori reg,$zero,lower 16 bitsCS61C L17 MIPS Instruction Format III (17) Spring 2008 © UCBTrue Assembly Language (2/3)• Problem:• When breaking up a pseudo-instruction,the assembler may need to use an extraregister• If it uses any regular register, itʼll overwritewhatever the program has put into it.• Solution:• Reserve a register ($1, called $at for“assembler temporary”) that assemblerwill use to break up pseudo-instructions.• Since the assembler may use this at anytime, itʼs not safe to code with it.CS61C L17 MIPS Instruction Format III (18) Spring 2008 © UCBExample
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