Review 1 1 2 Approaches to Writes Write Through Write twice current level and next level down Write Back Write only to current level write dirty block to next level down only on miss CS61C Virtual Memory 2nd try Advice on Courses Reduce Miss Penalty Lecture 19 Add a L2 cache April 7 1999 Dave Patterson http cs berkeley edu patterson www inst eecs berkeley edu cs61c schedule html cs 61C L19 VM 1 Patterson Spring 99 UCB Outline Sharing Protecting Memory by Swapping Sharing Protecting Memory by Base Bounds Weakness of Base Bounds Protection Manage memory disk transfers Explain as cache block page miss page fault write back fully associative LRU Included protection as bonus now critical cs 61C L19 VM 2 Review C memory allocation Address 232 1 sp stack pointer Administrivia Advice on courses Virtual Memory Paging Problems and solutions of Virtual Memory Conclusion global pointer gp 0 cs 61C L19 VM 3 Patterson Spring 99 UCB Patterson Spring 99 UCB cs 61C L19 VM 4 Stack Space for saved procedure information Heap Explicitly created space e g malloc C pointers Static Variables declared once per program Code Program Patterson Spring 99 UCB Memory Allocation in Reality Sharing Solution 1 earliest Address Prior schemes assumed 1 process is running reality is many processes Even a single person using User C User B When time to run a new process swap new user and old user User A Protection only 1 user at a time so OK but OS not protected OS Problem slow to swap processes between memory and disk For now ignore I O split of address space 0 cs 61C L19 VM 5 Patterson Spring 99 UCB Sharing Solution 2 Base Bounds Address Add Hardware to protect users from each other so that must not always swap to disk to share machine Add special registers Bound Register address must fit inside this value bound base User C OS 0 Patterson Spring 99 UCB User A OS 0 cs 61C L19 VM 6 Patterson Spring 99 UCB Base Bounds mapping Function Real memory address Address if Program Address Bound ADDRESS ERROR base bound if Program Address Bound Base Program Address Note User A Base Register added to each memory address Also called Relocation Register cs 61C L19 VM 7 User B 0 Also called Protection Register Copy other Users processes to Disk when not in use Browser Compiler Mail Address Allows safe sharing without always swapping to disk base bound are special registers like epc NOT like 0 31 cs 61C L19 VM 8 User C User B base User A OS 0 Patterson Spring 99 UCB 1 What if need to grow size of Process B If lucky space above process available Address Address User C base bound User B base base bound 0 cs 61C L19 VM 9 User C base User A OS 0 OS Patterson Spring 99 UCB 3 What if need to grow size of Process B If unluckier must swap to disk Address Address base cs 61C L19 VM 11 0 cs 61C L19 VM 10 User B User A User A OS OS User B User A User A OS OS User C User B base base bound base User A 0 User B base bound User C User B base User A 0 OS Patterson Spring 99 UCB base bound User B 0 User C User C Danger of Base Bounds Sharing Scheme Lots of free memory but in small fragments too small to be useful User C base bound base bound base User A Address User B If unlucky must copy to create space Address 2 What if need to grow size of Process B OS Patterson Spring 99 UCB User B User A cs 61C L19 VM 12 0 OS Enough space for User D but discontinuous so cannot use Called Memory Fragmentation Problem Happens when processes quit too Base bounds HW will not solve Patterson Spring 99 UCB Administrivia Project 5 Due 4 14 design and implement a cache in software and plug into instruction simulator Next Readings 5 1 skip clocking 5 2 4 5 pages 230 240 4 6 pages 250 256 264 4 7 pages 265 273 How many lectures to cover 2 3 Administrivia General Course Philosophy Take variety of undergrad courses now to get introduction to areas Can learn advanced material on own later once know vocabulary Who knows what you will work on over a 40 year career 9th homework Due 4 14 or 4 16 7PM Exercises 7 35 4 24 Vote on leaving on Wed vs delaying to Friday only when there is a project due on Wed Wed TA office hours Fri spread 61C load cs 61C L19 VM 13 Patterson Spring 99 UCB Administrivia Courses for Telebears General Philosophy Take courses from great teachers HKN ratings 6 very good 5 not good hkn eecs toplevel coursesurveys html Top Faculty Course may teach soon CS 150 logic design Katz 6 2 F92 CS 152 computer CS 164 compilers Patterson 6 7 S95 Rowe 6 1 S98 CS 169 SW engin Brewer CS 174 combinatorics Sinclair 6 2 S98 6 1 F97 CS 186 data bases 6 2 S98 cs 61C L19 VM 15 Wang Patterson Spring 99 UCB cs 61C L19 VM 14 Patterson Spring 99 UCB If many good teachers My recommendations CS169 Software Engineering Everyone writes programs even HW designers Often programs are written in groups learn skill now in school before it counts EE122 Introduction to Communication Networks World is getting connected communications must play major role CS162 Operating Systems All special purpose HW will run a layer of SW that uses processes and concurrent programming CS162 is the closest thing cs 61C L19 VM 16 Patterson Spring 99 UCB If many good teachers Courses to consider Administrivia Courses for Telebears Remember E190 Technical Communication Talent in writing and speaking critical for success Now required for EECS majors Teacher quality more important to learning experience than official course content Take courses from great teachers CS 150 Lab Hardware Design Hands on HW design CS 152 Design a Computer CS 188 Understand databases Information more important now than computation cs 61C L19 VM 17 Patterson Spring 99 UCB Inspiration for Solution 3 Provide Hardware to allow discontinuous memory to look continuous to new process User C base bound base Enough space for User D but discontinuous 0 Patterson Spring 99 UCB Mapping Virtual Memory to Physical Memory Virtual Memory Divide into equal sized chunks about 4KB Stack Any chunk of Virtual Memory assigned to any chuck of Physical Memory page 64 MB Physical Memory User B User A cs 61C L19 VM 19 cs 61C L19 VM 18 OS Heap Solution 3 called Virtual Memory or Paging Will specify new HW mapping function Patterson Spring 99 UCB Static 0 cs 61C L19 VM 20 Code 0 Patterson Spring 99 UCB Virtual Memory Mapping Function Cannot have simple function to predict arbitrary mapping Notes on Page Table Solves Fragmentation all chunks same size so all holes can be used Use table lookup of mappings To grow a process ask Operating System Page Number Offset
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