CS61C Negative Numbers and Logical Operations Lecture 7 February 10 1999 Dave Patterson http cs berkeley edu patterson www inst eecs berkeley edu cs61c schedule html cs 61C L7 Number 1 Patterson Spring 99 UCB Review 1 2 MIPS assembly language instructions mapped to numbers in 3 formats 6 bits R op I op J op 5 bits 5 bits rs rt rs rt 5 bits 5 bits 6 bits rd shamt funct immediate address Op field determines format Binary Decimal Assembly Symbolic Assembly C Reverse Engineering or Disassembly Its hard to do therefore people like shipping binary machine language more than cs 61C L7 Number 2 Patterson Spring 99 UCB Review 2 2 Programming language model of memory allocation and pointers Allocate in stack vs heap vs global areas Arguments passed call by value vs call by reference Pointer in C is HLL version of machine address cs 61C L7 Number 3 Patterson Spring 99 UCB Numbers Review Number Base B B symbols per digit Base 10 Decimal Base 2 Binary 0 1 2 3 4 5 6 7 8 9 0 1 Number representation d31d30 d2d1d0 d31 x B31 d30 x B30 d2 x B2 d1 x B1 d0 x B0 One billion 1 000 000 000ten is 0011 1011 1001 1010 1100 1010 0000 0000 two 228 224 220 216 212 28 24 20 1x229 1x228 1x227 1x225 1x224 1x223 1x220 1x219 1x217 1x215 1x214 1x211 1x29 536 870 912 268 435 456 134 217 728 33 554 432 16 777 216 8 388 608 1 048 576 524 288 131 072 32 768 16 384 2 048 512 cs 61C L7 Number 4 Patterson Spring 99 UCB Overvie w if Numbers too Big What How Represent Negative Numbers What if Result doesn t fit in register More Compact Notation than Binary Administrivia What s this stuff good for Shift Instructions And Or Instructions Conclusion cs 61C L7 Number 5 Patterson Spring 99 UCB What if too big Binary bit patterns above are simply representatives of numbers Numbers really have an infinite number of digits with almost all being zero except for a few of the rightmost digits Just don t normally show leading zeros If result of add or any other arithmetic operation cannot be represented by these rightmost hardware bits overflow is said to have occurred Up to Compiler and OS what to do cs 61C L7 Number 6 Patterson Spring 99 UCB How avoid overflow allow it sometimes Some languages detect overflow Ada some don t C MIPS solution is 2 kinds of arithmetic instructions to recognize 2 choices add add add immediate addi and subtract sub cause exceptions on overflow add unsigned addu add immediate unsigned addiu and subtract unsigned subu do not cause exceptions on overflow Compiler selects appropriate arithmetic MIPS C compilers produce addu addiu subu cs 61C L7 Number 7 Patterson Spring 99 UCB What if Overflow Detected An exception or interrupt occurs Address of the instruction that overflowed is saved in a register Computer jumps to predefined address to invoke appropriate routine for that exception Like an unplanned hardware function call Operating system decides what to do In some situations program continues after corrective code is executed MIPS support exception program counter EPC contains address of that instruction move from system control mfc0 to copy EPC cs 61C L7 Number 8 Patterson Spring 99 UCB How Represent Negative Numbers Obvious solution add a separate sign sign represented in a single bit representation called sign and magnitude Shortcomings of sign and magnitude Where to put the sign bit right left Separate sign bit means it has both a positive and negative zero lead to problems for inattentive programmers 0 0 Adder may need extra step size don t know sign in advance Thus sign and magnitude was abandoned cs 61C L7 Number 9 Patterson Spring 99 UCB Search for Negative Number Representation Obvious solution didn t work find another What is result for unsigned numbers if tried to subtract large number from a small one Would try to borrow from string of leading 0s so result would have a string of leading 1s With no obvious better alternative pick representation that made the hardware simple leading 0s positive leading 1s negative 000000 xxx is 0 111111 xxx is 0 This representation called two s complement cs 61C L7 Number 10 Patterson Spring 99 UCB Two s Complement 0000 0000 0000 0000 0000 0000 0111 1111 0111 1111 0111 1111 1000 0000 1000 0000 1000 0000 1111 1111 1111 1111 1111 1111 0000 0000 0000two 0000 0000 0001two 0000 0000 0010two 1111 1111 1111 0000 0000 0000 1111 1111 1111 0000 0000 0000 0ten 1ten 2ten 1101two 2 147 483 645ten 1110two 2 147 483 646ten 1111two 2 147 483 647ten 0000two 2 147 483 648ten 0001two 2 147 483 647ten 0010two 2 147 483 646ten 1111 1111 1101two 1111 1111 1110two 1111 1111 1111two 3ten 2ten 1ten One zero 1st bit 0 or 0 called sign bit but one negative with no positive 2 147 483 648ten cs 61C L7 Number 11 Patterson Spring 99 UCB Two s Complement Formula Example Recognizing role of sign bit can represent positive and negative numbers in terms of the bit value times a power of 2 d31 x 231 d30 x 230 d2 x 22 d1 x 21 d0 x 20 Example 1111 1111 1111 1111 1111 1111 1111 1100two 1x 231 1x230 1x229 1x22 0x21 0x20 231 230 229 22 0 0 2 147 483 648ten 2 147 483 644ten 4ten cs 61C L7 Number 12 Patterson Spring 99 UCB Overflow for Two s Complement Numbers Adding or subtracting 2 32 bit numbers can yield a result that needs 33 bits sign bit set with value of result instead of proper sign of result since need just 1 extra bit only sign bit can be wrong Op A B Result A B 0 0 0 A B 0 0 0 A B 0 0 0 A B 0 0 0 Adding operands with different signs subtracting with same signs overflow cannot occur cs 61C L7 Number 13 Patterson Spring 99 UCB Signed v Unsigned Comparisons Note memory addresses naturally start at 0 and continue to the largest address That is negative addresses make no sense C makes distinction in declaration integer int can be positive or negative unsigned integers unsigned int only positive Thus MIPS needs two styles of compare Set on less than slt and set on less than immediate slti work with signed integers Set on less than unsigned sltu and set on less than immediate unsigned sltiu cs 61C L7 Number 14 Patterson Spring 99 UCB Example Signed v Unsigned Comparisons s0 has 1111 1111 1111 1111 1111 1111 1111 1100 two s1 has 0011 1011 1001 1010 1000 1010 0000 0000 two What are t0 t1 after slt t0 s0 s1 signed compare sltu t1 s0 s1 unsigned compare t0 4ten 1 000 000 000ten t1 4 294 967 292ten 1 000 000 000ten cs 61C L7 Number 15 Patterson Spring 99 UCB Administrivia Readings 4 1 4 2 4 3 3 7 4 8 skip HW 3rd …
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