3/18/11%1%CS%61C:%Great%Ideas%in%Computer%Architecture%(Machine%Structures)%Switches,*Transistors,*Gates,*Flip4Flops*Instructors:%Randy%H.%Katz%David%A.%PaGerson%hGp://inst.eecs.Berkeley.edu/~cs61c/sp11%3/17/11% 1%Spring%2011%PP%Lecture%#17%3/17/11% Spring%2011%PP%Lecture%#17% 2%Review%• SequenUal%soVware%is%slow%soVware%– SIMD%and%MIMD%only%path%to%higher%performance%• MulUprocessor/MulUcore%uses%Shared%Memory%– Cache%coherency%implements%shared%memory%even%with%mulUple%copies%in%mulUple%caches%– False%sharing%a%concern;%watch%block%size!%• Data%races%lead%to%subtle%parallel%bugs%• SynchronizaUon%via%atomic%operaUons:%– MIPS%does%it%with%Load%Linked%+%Store%CondiUonal%• OpenMP%as%simple%parallel%extension%to%C%– Threads,%Parallel%for,%private,%criUcal%secUons,%…%%3/17/11% Spring%2011%PP%Lecture%#17% 3%You%Are%Here!%• Parallel%Requests%Assigned%to%computer%e.g.,%Search%“Katz”%• Parallel%Threads%Assigned%to%core%e.g.,%Lookup,%Ads%• Parallel%InstrucUons%>1%instrucUon%@%one%Ume%e.g.,%5%pipelined%instrucUons%• Parallel%Data%>1%data%item%@%one%Ume%e.g.,%Add%of%4%pairs%of%words%• Hardware%descripUons%All%gates%funcUoning%in%parallel%at%same%Ume%3/17/11% Spring%2011%PP%Lecture%#17% 4%Smart%Phone%Warehouse%Scale%Computer%So5ware********Hardware*Harness*Parallelism*&*Achieve*High*Performance*Logic%Gates%Core% Core%…%%%%%%Memory%%%%%%%%%%%%%%%(Cache)%Input/Output%Computer%Main%Memory%Core%%%%%%%%%%InstrucUon%Unit(s)%%%%%%%%FuncUonal%Unit(s)%A3+B3%A2+B2%A1+B1%A0+B0%Today %Levels%of%RepresentaUon/InterpretaUon%lw %%%$t0,%0($2)%lw %%%$t1,%4($2)%sw %%%$t1,%0($2)%sw %%%$t0,%4($2)%High%Level%Language%Program%(e.g.,%C)%Assembly%%Language%Program%(e.g.,%MIPS)%Machine%%Language%Program%(MIPS)%Hardware%Architecture%DescripCon%(e.g.,%block%diagrams)%%Compiler)Assembler)Machine)Interpreta4on)temp%=%v[k];%v[k]%=%v[k+1];%v[k+1]%=%temp;%0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 !Logic%Circuit%DescripCon%(Circuit%SchemaCc%Diagrams)%Architecture)Implementa4on)Anything%can%be%represented%as%a%number,%%i.e.,%data%or%instrucUons%3/17/11% 5%Spring%2011%PP%Lecture%#17%Agenda%• Switching%Networks,%Transistors%• Administrivia%• Gates%and%Truth%Tables%for%Circuits%• Technology%Break%• Boolean%Algebra%• States%and%FlipPFlops%• Summary%3/17/11% 6%Fall%2010%PP%Lecture%#22%3/18/11%2%Hardware%Design%• Next%several%weeks:%we’ll%study%how%a%modern%processor%is%built;%starUng%with%basic%elements%as%building%blocks%• Why%study%hardware%design?%– Understand%capabiliUes%and%limitaUons%of%hw%in%general%and%processors%in%parUcular%– What%processors%can%do%fast%and%what%they%can’t%do%fast%%(avoid%slow%things%if%you%want%your%code%to%run%fast!)%– Background%for%more%in%depth%hw%courses%(CS%150,%CS%152)%– There%is%just%so%much%you%can%do%with%standard%processors:%you%may%need%to%design%own%custom%hw%for%extra%performance%– Even%some%commercial%processors%today%have%customizable%hardware!%3/17/11% Spring%2011%PP%Lecture%#17% 7%Synchronous%Digital%Systems%3/17/11% Spring%2011%PP%Lecture%#17% 8%Synchronous:%• %All%operaUons%coordinated%by%a%central%clock% “Heartbeat”%of%the%system!%Digital:%• %Represent%All%values%by%2%discrete%values%• %Electrical%signals%are%treated%as%1’s%and%0’s%• 1%and%0%are%complements%of%each%other%• High%/low%voltage%for%true%/%false,%1%/%0%Hardware*of*a*processor,*such*as*the*MIPS,*is*an*example*of*a*Synchronous*Digital*System*Spring%2011%PP%Lecture%#17%A Z Switches:%Basic%Element%of%Physical%ImplementaUons%• ImplemenUng%a%simple%circuit%(arrow%shows%acUon%if%wire%changes%to%“1”%or%is%asserted):%Z ≡ A A Z 3/17/11% 9%Close switch (if A is “1” or asserted) and turn on light bulb (Z) Open switch (if A is “0” or unasserted) and turn off light bulb (Z) Spring%2011%PP%Lecture%#17%AND OR Z ≡ A and B Z ≡ A or B A B A B Switches%(cont’d)%• Compose%switches%into%more%complex%ones%(Boolean%funcUons):%3/17/11% 10%Historical%Note%• Early%computer%designers%built%ad%hoc%circuits%from%switches%• Began%to%noUce%common%paGerns%in%their%work:%ANDs,%ORs,%…%• Master’s%thesis%(by%Claude%Shannon)%made%link%between%work%and%19th%Century%%MathemaUcian%George%Boole%– Called%it%“Boolean”%in%his%honor%• Could%apply%math%to%give%theory%to%%hardware%design,%minimizaUon,%…%3/17/11% Spring%2011%PP%Lecture%#17% 11%Spring%2011%PP%Lecture%#17%Transistor%Networks%• Modern%digital%systems%designed%in%CMOS%– MOS:%MetalPOxide%on%Semiconductor%– C%for%complementary:%use%pairs%of%normallyPopen%and%normallyPclosed%switches%• CMOS%transistors%act%as%voltagePcontrolled%switches%– Simi lar,%though%easier%to%work%with,%than%relay%switches%from%earlier%era%%3/17/11% 12%3/18/11%3%From:%University%of%Texas%at%AusUn%%%%CS310%%P%%Computer%OrganizaUon%%%%%Spring%2009%%%Don%Fussell%CMOS%Transistors%• High%voltage%(Vdd)%represents%1,%or%true%• Low%voltage%(0%volts%or%Ground)%represents%0,%or%false%• Let%threshold%voltage%(Vth)%decide%if%a%0%or%a%1%• If%switches%control%whether%voltages%can%propagate%through%a%circuit,%can%build%a%computer%• Our%switches:%CMOS%transistors%Spring%2011%PP%Lecture%#17%n-channel transitor open when voltage at Gate is low closes when: voltage(Gate) > voltage (Threshold) p-channel transistor closed when voltage at Gate is low opens when: voltage(Gate) > voltage (Threshold) CMOS%Transistors%• Three%terminals:%source,%gate,%and%drain%– Switch%acUon:%if%voltage%on%gate%terminal%is%(some%amount)%higher/lower%than%source%terminal%then%conducUng%path%established%between%drain%and%source%terminals%(switch%is%closed)%Gate Source Drain Gate Source Drain 3/17/11% 14%Note%circle%symbol%to%indicate%“NOT”%or%“complement”%Gate Drain Source From%University%of%Texas%at%AusUn%%%%CS310%%P%%Computer%OrganizaUon%%%%%Spring%2009%%%Don%Fussell%CMOS%circuit%rules%• Never%create%a%path%from%Vdd%to%gnd%(ground)%• Don’t%pass%weak%values%– NPtype%transistors%pass%weak%1’s%(Vdd%P%Vth)%– NPtype%transistors%pass%strong%0’s%(gnd)%– Use%NPtype%transistors%only%to%pass%0’s%(n%to%negaUve)%– Conversely%for%PPtype%transistors%• Pass%weak%0’s%(Vth),%strong%1’s%(Vdd)%•
View Full Document
Unlocking...