3 18 11 CS 61C Great Ideas in Computer Architecture Machine Structures Switches Transistors Gates Flip Flops Instructors Randy H Katz David A PaGerson hGp inst eecs Berkeley edu cs61c sp11 3 17 11 Spring 2011 Lecture 17 1 Assigned to computer e g Search Katz SIMD and MIMD only path to higher performance MulUprocessor MulUcore uses Shared Memory Parallel Threads Cache coherency implements shared memory even with mulUple copies in mulUple caches False sharing a concern watch block size Assigned to core e g Lookup Ads 1 instrucUon one Ume e g 5 pipelined instrucUons Parallel Data MIPS does it with Load Linked Store CondiUonal 1 data item one Ume e g Add of 4 pairs of words OpenMP as simple parallel extension to C Hardware descripUons Threads Parallel for private criUcal secUons All gates funcUoning in parallel at same Ume Spring 2011 Lecture 17 3 3 17 11 Levels of RepresentaUon InterpretaUon Assembler Machine Language Program MIPS t0 0 2 t1 4 2 t1 0 2 t0 4 2 0000 1010 1100 0101 1001 1111 0110 1000 1100 0101 1010 0000 Anything can be represented as a number i e data or instrucUons 0110 1000 1111 1001 1010 0000 0101 1100 Computer Core Core Memory Cache Input Output InstrucUon Unit s Core FuncUonal Unit s A0 B0 A1 B1 A2 B2 A3 B3 Main Memory Today Logic Gates Spring 2011 Lecture 17 4 Agenda temp v k v k v k 1 v k 1 temp lw lw sw sw Smart Phone Warehouse Scale Computer Harness Parallelism Achieve High Performance Parallel InstrucUons Data races lead to subtle parallel bugs SynchronizaUon via atomic operaUons Compiler Assembly Language Program e g MIPS 2 So5ware Hardware Parallel Requests SequenUal soVware is slow soVware High Level Language Program e g C Spring 2011 Lecture 17 You Are Here Review 3 17 11 3 17 11 1111 1001 1000 0110 0101 1100 0000 1010 1000 0110 1001 1111 Machine Interpreta4on Hardware Architecture DescripCon e g block diagrams Architecture Implementa4on Switching Networks Transistors Administrivia Gates and Truth Tables for Circuits Technology Break Boolean Algebra States and Flip Flops Summary Logic Circuit DescripCon 3 17 11 Circuit SchemaCc Diagrams Spring 2011 Lecture 17 5 3 17 11 Fall 2010 Lecture 22 6 1 3 18 11 Hardware Design Synchronous Digital Systems Next several weeks we ll study how a modern processor is built starUng with basic elements as building blocks Why study hardware design Understand capabiliUes and limitaUons of hw in general and processors in parUcular What processors can do fast and what they can t do fast avoid slow things if you want your code to run fast Background for more in depth hw courses CS 150 CS 152 There is just so much you can do with standard processors you may need to design own custom hw for extra performance Hardware of a processor such as the MIPS is an example of a Synchronous Digital System Synchronous All operaUons coordinated by a central clock Heartbeat of the system Digital Represent All values by 2 discrete values Electrical signals are treated as 1 s and 0 s 1 and 0 are complements of each other Even some commercial processors today have customizable hardware High low voltage for true false 1 0 3 17 11 Spring 2011 Lecture 17 7 3 17 11 Spring 2011 Lecture 17 8 Switches Basic Element of Physical ImplementaUons Switches cont d ImplemenUng a simple circuit arrow shows acUon if wire changes to 1 or is asserted Compose switches into more complex ones Boolean funcUons A Z AND Close switch if A is 1 or asserted and turn on light bulb Z A Z Spring 2011 Lecture 17 OR 9 3 17 11 Spring 2011 Lecture 17 10 Transistor Networks Modern digital systems designed in CMOS Early computer designers built ad hoc circuits from switches Began to noUce common paGerns in their work ANDs ORs Master s thesis by Claude Shannon made link between work and 19th Century MathemaUcian George Boole MOS Metal Oxide on Semiconductor C for complementary use pairs of normally open and normally closed switches CMOS transistors act as voltage controlled switches Called it Boolean in his honor Similar though easier to work with than relay switches from earlier era Could apply math to give theory to hardware design minimizaUon Spring 2011 Lecture 17 Z A or B B Historical Note 3 17 11 Z A and B A Open switch if A is 0 or unasserted and turn off light bulb Z Z A 3 17 11 B A 11 3 17 11 Spring 2011 Lecture 17 12 2 3 18 11 CMOS Transistors CMOS Transistors High voltage Vdd represents 1 or true Low voltage 0 volts or Ground represents 0 or false Let threshold voltage Vth decide if a 0 or a 1 If switches control whether voltages can propagate through a circuit can build a computer Our switches CMOS transistors Switch acUon if voltage on gate terminal is some amount higher lower than source terminal then conducUng path established between drain and source terminals switch is closed Gate Source 3v 0v n channel transitor open when voltage at Gate is low closes when voltage Gate voltage Threshold Make sure there s always a path to Vdd or gnd MOS Networks p channel transistor closed when voltage at Gate is low opens when voltage Gate voltage Source y 0 volts gnd 3 volts Vdd Spring 2011 Lecture 17 16 Agenda what is the relationship between x and y 0 volts gnd 3 volts Vdd what is the relationship between x and y Called an invertor or not gate 3 17 11 From University of Texas at AusUn CS310 Computer OrganizaUon Spring 2009 Don Fussell 0v 14 x Y Use pairs of N type and P type to get strong values Never leave a wire undriven x Spring 2011 Lecture 17 X Pass weak 0 s Vth strong 1 s Vdd Use P type transistors only to pass 1 s p to posiUve Y Drain p channel transistor closed when voltage at Gate is low opens when voltage Gate voltage Threshold MOS Networks N type transistors pass weak 1 s Vdd Vth N type transistors pass strong 0 s gnd Use N type transistors only to pass 0 s n to negaUve Conversely for P type transistors 3v Source p channel transistor closed when voltage at Gate is low opens when voltage Gate voltage Threshold Never create a path from Vdd to gnd ground Don t pass weak values n channel transitor open when voltage at Gate is low closes when voltage Gate voltage Source X Note circle symbol to indicate NOT or complement Gate Drain 3 17 11 CMOS circuit rules Drain Three terminals source gate and drain n channel transitor open when voltage at Gate is low closes when voltage Gate voltage Threshold From University of Texas at AusUn CS310 Computer OrganizaUon Spring 2009 Don Fussell Gate Source y 3 volts Vdd 0 volts gnd Switching Networks Transistors Administrivia Gates and
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