CS61C L6 Intro MIPS ; Load & Store (1) Beamer, Summer 2 007 © UCBScott Beamer, Instructorinst.eecs.berkeley.edu/~cs61cCS61C : Machine Structures Lecture #6 – Intro MIPS; Load & Store2007-7-3Interesting Researchon Social Sites byDanah Boydwww.danah.orgCS61C L6 Intro MIPS ; Load & Store (2) Beamer, Summer 2 007 © UCBReview• The operations a CPU can perform aredefined by its ISA (Instruction SetArchitecture)• In MIPS Assembly Language:• One Instruction (simple operation) per line• Simpler is better, smaller is faster• MIPS Registers (32 of them, each 32-bit)• So far you know about $t0 - $t7 and $s0-$s7• Registers have no type, the operation tellsCPU how to treat itCS61C L6 Intro MIPS ; Load & Store (3) Beamer, Summer 2 007 © UCBComments in Assembly• Another way to make your code morereadable: comments!• Hash (#) is used for MIPS comments• anything from hash mark to end of line isa comment and will be ignored• Note: Different from C.• C comments have format/* comment */so they can span many linesCS61C L6 Intro MIPS ; Load & Store (4) Beamer, Summer 2 007 © UCBAssembly Instructions• In assembly language, each statement(called an Instruction), executesexactly one of a short list of simplecommands• Unlike in C (and most other High LevelLanguages), each line of assemblycode contains at most 1 instruction• Instructions are related to operations(=, +, -, *, /) in C or Java• Ok, enough already…gimme my MIPS!CS61C L6 Intro MIPS ; Load & Store (5) Beamer, Summer 2 007 © UCBMIPS Addition and Subtraction (1/4)• Syntax of Instructions:1 2,3,4where:1) operation by name2) operand getting result (“destination”)3) 1st operand for operation (“source1”)4) 2nd operand for operation (“source2”)• Syntax is rigid:• 1 operator, 3 operands• Why? Keep Hardware simple via regularityCS61C L6 Intro MIPS ; Load & Store (6) Beamer, Summer 2 007 © UCBAddition and Subtraction of Integers (2/4)• Addition in Assembly• Example: add $s0,$s1,$s2 (in MIPS)Equivalent to: a = b + c (in C)where MIPS registers $s0,$s1,$s2 areassociated with C variables a, b, c• Subtraction in Assembly• Example: sub $s3,$s4,$s5 (in MIPS)Equivalent to: d = e - f (in C)where MIPS registers $s3,$s4,$s5 areassociated with C variables d, e, fCS61C L6 Intro MIPS ; Load & Store (7) Beamer, Summer 2 007 © UCBAddition and Subtraction of Integers (3/4)• How do the following C statement?a = b + c + d - e;• Break into multiple instructionsadd $t0, $s1, $s2 # temp = b + cadd $t0, $t0, $s3 # temp = temp + dsub $s0, $t0, $s4 # a = temp - e• Notice: A single line of C may break upinto several lines of MIPS.• Notice: Everything after the hash markon each line is ignored (comments)CS61C L6 Intro MIPS ; Load & Store (8) Beamer, Summer 2 007 © UCBAddition and Subtraction of Integers (4/4)• How do we do this?f = (g + h) - (i + j);• Use intermediate temporary registeradd $t0,$s1,$s2 # temp = g + hadd $t1,$s3,$s4 # temp = i + jsub $s0,$t0,$t1 # f=(g+h)-(i+j)CS61C L6 Intro MIPS ; Load & Store (9) Beamer, Summer 2 007 © UCBRegister Zero• One particular immediate, the numberzero (0), appears very often in code.• So we define register zero ($0 or$zero) to always have the value 0; egadd $s0,$s1,$zero (in MIPS)f = g (in C)where MIPS registers $s0,$s1 areassociated with C variables f, g• defined in hardware, so an instructionadd $zero,$zero,$s0will not do anything!CS61C L6 Intro MIPS ; Load & Store (10) Beamer, Summer 2 007 © UCBImmediates• Immediates are numerical constants.• They appear often in code, so thereare special instructions for them.• Add Immediate:addi $s0,$s1,10 (in MIPS)f = g + 10 (in C)where MIPS registers $s0,$s1 areassociated with C variables f, g• Syntax similar to add instruction,except that last argument is a numberinstead of a register.CS61C L6 Intro MIPS ; Load & Store (11) Beamer, Summer 2 007 © UCBImmediates• There is no Subtract Immediate inMIPS: Why?• Limit types of operations that can bedone to absolute minimum• if an operation can be decomposed into asimpler operation, don’t include it•addi …, -X = subi …, X => so no subi• addi $s0,$s1,-10 (in MIPS)f = g - 10 (in C)where MIPS registers $s0,$s1 areassociated with C variables f, gCS61C L6 Intro MIPS ; Load & Store (12) Beamer, Summer 2 007 © UCBPeer InstructionA. Types are associated with declarationin C (normally), but are associated withinstruction (operator) in MIPS.B. Since there are only 8 local ($s) and 8temp ($t) variables, we can’t writeMIPS for C exprs that contain > 16 vars.C. If p (stored in $s0) were a pointer to anarray of ints, then p++; would beaddi $s0 $s0 1 ABC1: FFF2: FFT3: FTF4: FTT5: TFF6: TFT7: TTF8: TTTCS61C L6 Intro MIPS ; Load & Store (13) Beamer, Summer 2 007 © UCBAdministrivia• WLA is a great resource• wla.berkeley.edu• Assignments• HW2 due 7/5 @ 11:59pm• HW3 due 7/8 @ 11:59pm (to be posted today)• Proj1 due 7/12 @ 11:59pm (to be postedtoday)CS61C L6 Intro MIPS ; Load & Store (14) Beamer, Summer 2 007 © UCBAssembly Operands: Memory• C variables map onto registers; whatabout large data structures like arrays?• 1 of 5 components of a computer:memory contains such data structures• But MIPS arithmetic instructions onlyoperate on registers, never directly onmemory.• Data transfer instructions transfer databetween registers and memory:• Memory to register• Register to memoryCS61C L6 Intro MIPS ; Load & Store (15) Beamer, Summer 2 007 © UCBAnatomy: 5 components of any ComputerPersonal Computer Processor ComputerControl(“brain”)DatapathRegistersMemory DevicesInputOutputLoad (from)Load (from)Store (to)Store (to)These are “data transfer” instructions…Registers are in the datapath of theprocessor; if operands are in memory,we must transfer them to the processorto operate on them, and then transferback to memory when done.CS61C L6 Intro MIPS ; Load & Store (16) Beamer, Summer 2 007 © UCBData Transfer: Memory to Reg (1/4)• To transfer a word of data, we need tospecify two things:• Register: specify this by # ($0 - $31) orsymbolic name ($s0,…, $t0, …)• Memory address: more difficult- Think of memory as a single one-dimensional array, so we can addressit simply by supplying a pointer to amemory address.- Other times, we want to be able tooffset from this pointer.• Remember: “Load FROM memory”CS61C L6 Intro MIPS ; Load & Store (17) Beamer, Summer 2 007 © UCBData Transfer: Memory to Reg (2/4)• To specify a
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