B.10 Finite State Machines B-67128-bit word needs 8. This type of code is called a Hamming code, after R. Hamming,who described a method for creating such codes.As we saw earlier, digital logic systems can be classified as combinational orsequential. Sequential systems contain state stored in memory elements internalto the system. Their behavior depends both on the set of inputs supplied and onthe contents of the internal memory, or state of the system. Thus, a sequential sys-tem cannot be described with a truth table. Instead, a sequential system isdescribed as a finite state machine (or often just state machine). A finite statemachine has a set of states and two functions called the next-state function andthe output function. The set of states correspond to all the possible values of theinternal storage. Thus, if there are n bits of storage, there are 2nstates. The next-state function is a combinational function that, given the inputs and the currentstate, determines the next state of the system. The output function produces a setof outputs from the current state and the inputs. Figure B.10.1 shows this dia-grammatically. B.10Finite State Machines B.10FIGURE B.10.1 A state machine consists of internal storage that contains the state andtwo combinational functions: the next-state function and the output function. Often, theoutput function is restricted to take only the current state as its input; this does not change the capability ofa sequential machine, but does affect its internals. finite state machine Asequential logic function con-sisting of a set of inputs and out-puts, a next-state function that maps the current state and the inputs to a new state, and an output function that maps the current state and possibly the inputs to a set of asserted outputs.next-state function A combi-national function that, given the inputs and the current state, determines the next state of a finite state machine.InputsCurrent stateOutputsClockNext-statefunctionOutputfunctionNextstateB-68 Appendix B The Basics of Logic DesignThe state machines we discuss here and in Chapters 5 and 6 are synchronous.This means that the state changes together with the clock cycle, and a new state iscomputed once every clock. Thus, the state elements are updated only on theclock edge. We use this methodology in this section and throughout Chapters 5and 6, and we do not usually show the clock explicitly. We use state machinesthroughout Chapters 5 and 6 to control the execution of the processor and theactions of the datapath. To illustrate how a finite state machine operates and is designed, let’s look at asimple and classic example: controlling a traffic light. (Chapters 5 and 6 containmore detailed examples of using finite state machines to control processor execu-tion.) When a finite state machine is used as a controller, the output function isoften restricted to depend on just the current state. Such a finite state machine iscalled a Moore machine. This is the type of finite state machine we use throughoutthis book. If the output function can depend on both the current state and thecurrent input, the machine is called a Mealy machine. These two machines areequivalent in their capabilities, and one can be turned into the other mechanically.The basic advantage of a Moore machine is that it can be faster, while a Mealymachine may be smaller, since it may need fewer states than a Moore machine. InChapter 5, we discuss the differences in more detail and show a Verilog version offinite state control using a Mealy machine.Our example concerns the control of a traffic light at an intersection of a north-south route and an east-west route. For simplicity, we will consider only the greenand red lights; adding the yellow light is left for an exercise. We want the lights tocycle no faster than 30 seconds in each direction, so we will use a 0.033 Hz clock sothat the machine cycles between states at no faster than once every 30 seconds.There are two output signals: ■ NSlite: When this signal is asserted, the light on the north-south road isgreen; when this signal is deasserted the light on the north-south road is red. ■ EWlite: When this signal is asserted, the light on the east-west road is green;when this signal is deasserted the light on the east-west road is red. In addition, there are two inputs: NScar and EWcar.■ NScar: Indicates that a car is over the detector placed in the roadbed infront of the light on the north-south road (going north or south).■ EWcar: Indicates that a car is over the detector placed in the roadbed infront of the light on the east-west road (going east or west).The traffic light should change from one direction to the other only if a car is wait-ing to go in the other direction; otherwise, the light should continue to showgreen in the same direction as the last car that crossed the intersection.B.10 Finite State Machines B-69To implement this simple traffic light we need two states:■ NSgreen: The traffic light is green in the north-south direction.■ EWgreen: The traffic light is green in the east-west direction.We also need to create the next-state function, which can be specified with a table:Notice that we didn’t specify in the algorithm what happens when a carapproaches from both directions. In this case, the next-state function given abovechanges the state to ensure that a steady stream of cars from one direction cannotlock out a car in the other direction. The finite state machine is completed by specifying the output function: Before we examine how to implement this finite state machine, let’s look at agraphical representation, which is often used for finite state machines. In this rep-resentation, nodes are used to indicate states. Inside the node we place a list of theoutputs that are active for that state. Directed arcs are used to show the next-statefunction, with labels on the arcs specifying the input condition as logic functions.Figure B.10.2 shows the graphical representation for this finite state machine. A finite state machine can be implemented with a register to hold the currentstate and a block of combinational logic that computes the next-state functionand the output function. Figure B.10.3 shows how a finite state machine with 4bits of state, and thus up to 16 states, might look. To implement the finite statemachine in this way, we must first assign state numbers to the states. This processis called state assignment. For
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