CS61C Machine Structures Lecture 13 Input Output Polling and Interrupts October 11 2000 David Patterson http www inst eecs berkeley edu cs61c CS61C L13 1 Review 1 2 Pointer is high level language version of address Like goto with self imposed discipline can achieve clarity and simplicity Dereferences in C turn into loads or stores in MIPS code Powerful dangerous concept can cause difficult to fix bugs C supports pointers pointer arithmetic Java structure pointers have many of the same potential problems CS61C L13 2 Review 2 2 MIPS Signed v Unsigned overloaded term Do Don t sign extend lb lbu Don t overflow addu addiu subu multu divu Do signed unsigned compare slt slti sltu sltiu Immediate sign extension independent of term andi ori zero extend rest sign extend Assembler uses at to turn MAL into TAL CS61C L13 3 Outlin e I O Background Polling Interrupts CS61C L13 4 Anatomy 5 components of any Computer Computer Processor Memory active passive Control brain where programs Datapath data live brawn when running CS61C L13 Devices Input Output Keyboard Mouse Disk where programs data live when not running Display Printer 5 Motivation for Input Output I O is how humans interact with computers I O lets computers do amazing things Read pressure of synthetic hand and control synthetic arm and hand of fireman Control propellers fins communicate in BOB Breathable Observable Bubble Read bar codes of items in refrigerator Computer without I O like a car without wheels great technology but won t get 6 CS61C L13 you anywhere I O Device Examples and Speeds I O Speed bytes transferred per second from mouse to display million to 1 Behavior Partner Data Rate Device Kbytes sec Keyboard Input Human 0 01 Mouse Input Human 0 02 Line Printer Output Human 1 00 Floppy disk Storage Machine 50 00 Laser Printer Output Human 100 00 Magnetic Disk Storage Machine 10 000 00 Network LAN I or O Machine 10 000 00 Graphics Display Output Human 30 000 00 CS61C L13 7 What do we need to make I O work A way to connect many types of devices to the Proc Mem A way to control these devices respond to them and transfer data A way to present them to user programs so they are useful CS61C L13 Files Windows Operating System Proc Mem PCI Bus SCSI Bus cmd reg data reg 8 Instruction Set Architecture for I O Some machines have special input and output instructions Alternative model used by MIPS Input reads a sequence of bytes Output writes a sequence of bytes Memory also a sequence of bytes so use loads for input stores for output Called Memory Mapped Input Output A portion of the address space dedicated to communication paths to Input or Output devices no memory there CS61C L13 9 Memory Mapped I O Certain addresses are not regular memory Instead they correspond to registers in I O devices address 0 0xFFFF0000 cmd reg data reg 0xFFFFFFFF CS61C L13 10 Processor I O Speed Mismatch 500 MHz microprocessor can execute 500 million load or store instructions per second or 2 000 000 KB s data rate I O devices from 0 01 KB s to 30 000 KB s Input device may not be ready to send data as fast as the processor loads it Also might be waiting for human to act Output device may not be ready to accept data as fast as processor stores it What to do CS61C L13 11 Processor Checks Status before Acting Path to device generally has 2 registers 1 register says it s OK to read write I O ready often called Control Register 1 register that contains data often called Data Register Processor reads from Control Register in loop waiting for device to set Ready bit in Control reg to say its OK 0 1 Processor then loads from input or writes to output data register Load from device Store into Data Register resets Ready bit 1 0 of Control Register CS61C L13 12 SPIM I O Simulation SPIM simulates 1 I O device memorymapped terminal keyboard display Ready I E Read from keyboard receiver 2 device regs Writes to terminal transmitter 2 device regs Receiver Control IE Unused 00 00 0xffff0000 Receiver Data Received 0xffff0004 Unused 00 00 Byte CS61C L13 Ready I E Transmitter Control Unused 00 00 0xffff0008 Transmitter Data Transmitted 0xffff000c Unused Byte 13 SPIM Control register rightmost bit 0 Ready I O Receiver Ready 1 means character in Data Register not yet been read 1 0 when data is read from Data Reg Transmitter Ready 1 means transmitter is ready to accept a new character 0 Transmitter still busy writing last char I E bit discussed later Data register rightmost byte has data Receiver last char from keyboard rest 0 Transmitter when write rightmost byte writes char to display CS61C L13 14 I O Example Input Read from keyboard into v0 lui Waitloop andi beq lw t0 0xffff ffff0000 lw t1 0 t0 control t1 t1 0x0001 t1 zero Waitloop v0 4 t0 data Output Write to display from a0 lui Waitloop andi beq sw t0 0xffff ffff0000 lw t1 8 t0 control t1 t1 0x0001 t1 zero Waitloop a0 12 t0 data Processor waiting for I O called Polling CS61C L13 15 Administrivia Midterm will be in 2 weeks 5 8 pm Old midterms will be online CS61C L13 16 What s This Stuff Good For CS61C L13 Remote Diagnosis NeoRest ExII a high tech toilet features microprocessor controlled seat warmers automatic lid openers air deodorizers water sprays and blow dryers that do away with the need for toilet tissue About 25 percent of new homes in Japan have a washlet as these toilets are called Toto s engineers are now working on a model that analyzes urine to determine blood sugar levels in diabetics and then automatically sends a daily report by modem to the user s physician One Digital Day 1998 www intel com onedigitalday 17 Cost of Polling Assume for a processor with a 500 MHz clock it takes 400 clock cycles for a polling operation call polling routine accessing the device and returning Determine of processor time for polling Mouse polled 30 times sec so as not to miss user movement Floppy disk transfers data in 2 byte units and has a data rate of 50 KB second No data transfer can be missed Hard disk transfers data in 16 byte chunks and can transfer at 8 MB second Again no transfer can be missed CS61C L13 18 Processor time to poll mouse floppy Mouse Polling Clocks sec 30 400 12000 clocks sec Processor for polling 12 103 500 106 0 002 Polling mouse little impact on processor Times Polling Floppy sec 50 KB s 2B 25K polls sec Floppy Polling Clocks sec 25K 400 10 000 000 clocks sec Processor for polling 10 106 500 106 2 CS61C L13 OK if not too many I O devices 19 Processor time to hard disk Times Polling Disk sec 8 MB s 16B 500K
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