CS61C Machine Structures Lecture 13 MIPS Instruction Representation I 2 15 2006 John Wawrzynek www cs berkeley edu johnw www inst eecs berkeley edu cs61c CS 61C L13 MIPS Instruction Representation I 1 Wawrzynek Spring 2006 UCB Overview Instruction Representation Big idea stored program consequences of stored program Instructions as numbers Instruction encoding MIPS instruction format for Add instructions MIPS instruction format for Immediate Data transfer instructions CS 61C L13 MIPS Instruction Representation I 2 Wawrzynek Spring 2006 UCB Big Idea Stored Program Concept Computers built on 2 key principles 1 Instructions are represented as bit patterns can think of these as numbers 2 Therefore entire programs can be stored in memory to be read or written just like data Simplifies SW HW of computer systems Memory technology for data also used for programs CS 61C L13 MIPS Instruction Representation I 3 Wawrzynek Spring 2006 UCB Consequence 1 Everything Addressed Since all instructions and data are stored in memory everything has a memory address instructions data words both branches and jumps use these C pointers are just memory addresses they can point to anything in memory Unconstrained use of addresses can lead to nasty bugs up to you in C limits in Java One register keeps address of instruction being executed Program Counter PC Basically a pointer to memory Intel calls it Instruction Address Pointer a better name CS 61C L13 MIPS Instruction Representation I 4 Wawrzynek Spring 2006 UCB Consequence 2 Binary Compatibility Programs are distributed in binary form Programs bound to specific instruction set Different version for Macintoshes and PCs New machines want to run old programs binaries as well as programs compiled to new instructions Leads to backward compatible instruction set evolving over time Selection of Intel 8086 in 1981 for 1st IBM PC is major reason latest PCs still use 80x86 instruction set Pentium 4 could still run program from 1981 PC today CS 61C L13 MIPS Instruction Representation I 5 Wawrzynek Spring 2006 UCB Instructions as Numbers 1 2 Currently all data we work with is in words 32 bit blocks Each register is a word lw and sw both access memory one word at a time So how do we represent instructions Remember Computer only understands 1s and 0s so add t0 0 0 is meaningless MIPS wants simplicity since data is in words make instructions be words too CS 61C L13 MIPS Instruction Representation I 6 Wawrzynek Spring 2006 UCB Instructions as Numbers 2 2 One word is 32 bits so divide instruction word into fields Each field tells processor something about instruction We could define different fields for each instruction but MIPS is based on simplicity so define 3 basic types of instruction formats R format I format J format CS 61C L13 MIPS Instruction Representation I 7 Wawrzynek Spring 2006 UCB Instruction Formats I format used for instructions with immediates lw and sw since the offset counts as an immediate and the branches beq and bne but not the shift instructions later J format used for j and jal R format used for all other instructions It will soon become clear why the instructions have been partitioned in this way CS 61C L13 MIPS Instruction Representation I 8 Wawrzynek Spring 2006 UCB R Format Instructions 1 5 Define fields of the following number of bits each 6 5 5 5 5 6 32 6 5 5 5 5 6 For simplicity each field has a name opcode rs rt rd shamt funct Important On these slides and in book each field is viewed as a 5 or 6bit unsigned integer not as part of a 32 bit integer Consequence 5 bit fields can represent any number 0 31 while 6 bit fields can represent any number 0 63 CS 61C L13 MIPS Instruction Representation I 9 Wawrzynek Spring 2006 UCB R Format Instructions 2 5 What do these field integer values tell us opcode partially specifies what instruction it is Note This number is equal to 0 for all R Format instructions funct combined with opcode this number exactly specifies the instruction Question Why aren t opcode and funct a single 12 bit field Answer We ll answer this later CS 61C L13 MIPS Instruction Representation I 10 Wawrzynek Spring 2006 UCB R Format Instructions 3 5 More fields rs Source Register generally used to specify register containing first operand rt Target Register generally used to specify register containing second operand note that name is misleading rd Destination Register generally used to specify register which will receive result of computation CS 61C L13 MIPS Instruction Representation I 11 Wawrzynek Spring 2006 UCB R Format Instructions 4 5 Notes about register fields Each register field is exactly 5 bits which means that it can specify any unsigned integer in the range 0 31 Each of these fields specifies one of the 32 registers by number The word generally was used because there are exceptions that we ll see later E g mult and div have nothing important in the rd field since the dest registers are hi and lo mfhi and mflo have nothing important in the rs and rt fields since the source is determined by the instruction p 264 P H CS 61C L13 MIPS Instruction Representation I 12 Wawrzynek Spring 2006 UCB R Format Instructions 5 5 Final field shamt This field contains the amount a shift instruction will shift by Shifting a 32 bit word by more than 31 is useless so this field is only 5 bits so it can represent the numbers 0 31 This field is set to 0 in all but the shift instructions For a detailed description of field usage for each instruction see green insert in COD 3 e You can bring with you to all exams CS 61C L13 MIPS Instruction Representation I 13 Wawrzynek Spring 2006 UCB R Format Example 1 2 MIPS Instruction add 8 9 10 opcode 0 look up in table in book funct 32 look up in table in book rd 8 destination rs 9 first operand rt 10 second operand shamt 0 not a shift CS 61C L13 MIPS Instruction Representation I 14 Wawrzynek Spring 2006 UCB R Format Example 2 2 MIPS Instruction add 8 9 10 Decimal number per field representation 0 9 10 8 0 32 Binary number per field representation 000000 01001 01010 01000 00000 100000 hex representation decimal representation 012A 4020hex 19 546 144ten hex Called a Machine Language Instruction CS 61C L13 MIPS Instruction Representation I 15 Wawrzynek Spring 2006 UCB Administrivia CS 61C L13 MIPS Instruction Representation I 16 Wawrzynek Spring 2006 UCB I Format Instructions 1 4 What about instructions with immediates 5 bit field only represents numbers up to the value 31 immediates may be much larger
View Full Document
Unlocking...