CS 61C L13 MIPS Instruction Representation I (1) Wawrzynek Spring 2006 © UCB2/15/2006John Wawrzynek(www.cs.berkeley.edu/~johnw)www-inst.eecs.berkeley.edu/~cs61c/CS61C – Machine StructuresLecture 13 - MIPS InstructionRepresentation ICS 61C L13 MIPS Instruction Representation I (2) Wawrzynek Spring 2006 © UCBOverview – Instruction Representation° Big idea: stored program• consequences of stored program° Instructions as numbers° Instruction encoding° MIPS instruction format for Addinstructions° MIPS instruction format for Immediate,Data transfer instructionsCS 61C L13 MIPS Instruction Representation I (3) Wawrzynek Spring 2006 © UCBBig Idea: Stored-Program Concept° Computers built on 2 key principles:1) Instructions are represented asbit patterns - can think of these asnumbers.2) Therefore, entire programs can bestored in memory to be read or written just like data.° Simplifies SW/HW of computer systems:• Memory technology for data also usedfor programsCS 61C L13 MIPS Instruction Representation I (4) Wawrzynek Spring 2006 © UCBConsequence #1: Everything Addressed° Since all instructions and data are storedin memory, everything has a memoryaddress: instructions, data words• both branches and jumps use these° C pointers are just memory addresses:they can point to anything in memory• Unconstrained use of addresses can lead tonasty bugs; up to you in C; limits in Java° One register keeps address of instructionbeing executed: “Program Counter” (PC)• Basically a pointer to memory: Intel calls itInstruction Address Pointer, a better nameCS 61C L13 MIPS Instruction Representation I (5) Wawrzynek Spring 2006 © UCBConsequence #2: Binary Compatibility° Programs are distributed in binary form• Programs bound to specific instruction set• Different version for Macintoshes and PCs° New machines want to run old programs(“binaries”) as well as programs compiledto new instructions° Leads to “backward compatible”instruction set evolving over time° Selection of Intel 8086 in 1981 for 1st IBMPC is major reason latest PCs still use80x86 instruction set (Pentium 4); couldstill run program from 1981 PC todayCS 61C L13 MIPS Instruction Representation I (6) Wawrzynek Spring 2006 © UCBInstructions as Numbers (1/2)° Currently all data we work with is inwords (32-bit blocks):• Each register is a word.•lw and sw both access memory one wordat a time.° So how do we represent instructions?• Remember: Computer only understands1s and 0s, so “add $t0,$0,$0” ismeaningless.• MIPS wants simplicity: since data is inwords, make instructions be words tooCS 61C L13 MIPS Instruction Representation I (7) Wawrzynek Spring 2006 © UCBInstructions as Numbers (2/2)° One word is 32 bits, so divideinstruction word into “fields”.° Each field tells processor somethingabout instruction.° We could define different fields foreach instruction, but MIPS is based onsimplicity, so define 3 basic types ofinstruction formats:• R-format• I-format• J-formatCS 61C L13 MIPS Instruction Representation I (8) Wawrzynek Spring 2006 © UCBInstruction Formats° I-format: used for instructions withimmediates, lw and sw (since the offsetcounts as an immediate), and thebranches (beq and bne),• (but not the shift instructions; later)° J-format: used for j and jal° R-format: used for all other instructions° It will soon become clear why theinstructions have been partitioned inthis way.CS 61C L13 MIPS Instruction Representation I (9) Wawrzynek Spring 2006 © UCBR-Format Instructions (1/5)° Define “fields” of the following numberof bits each: 6 + 5 + 5 + 5 + 5 + 6 = 326 5 5 5 65opcode rs rt rd functshamt° For simplicity, each field has a name:° Important: On these slides and inbook, each field is viewed as a 5- or 6-bit unsigned integer, not as part of a32-bit integer.• Consequence: 5-bit fields can representany number 0-31, while 6-bit fields canrepresent any number 0-63.CS 61C L13 MIPS Instruction Representation I (10) Wawrzynek Spring 2006 © UCBR-Format Instructions (2/5)° What do these field integer values tell us?•opcode: partially specifies what instructionit is- Note: This number is equal to 0 for all R-Formatinstructions.•funct: combined with opcode, this numberexactly specifies the instruction• Question: Why aren’t opcode and funct asingle 12-bit field?- Answer: We’ll answer this later.CS 61C L13 MIPS Instruction Representation I (11) Wawrzynek Spring 2006 © UCBR-Format Instructions (3/5)° More fields:•rs (Source Register): gener ally used tospecify register containing first operand•rt (Target Register): generally used tospecify register containing secondoperand (note that name is misleading)•rd (Destination Register): generall y usedto specify register which will receiveresult of computationCS 61C L13 MIPS Instruction Representation I (12) Wawrzynek Spring 2006 © UCBR-Format Instructions (4/5)° Notes about register fields:• Each register field is exactly 5 bits, whichmeans that it can specify any unsignedinteger in the range 0-31. Each of thesefields specifies one of the 32 registers bynumber.• The word “generally” was used becausethere are exceptions that we’ll see later.E.g.,- mult and div have nothing important in therd field since the dest registers are hi and lo- mfhi and mflo have nothing important in thers and rt fields since the source isdetermined by the instruction (p. 264 P&H)CS 61C L13 MIPS Instruction Representation I (13) Wawrzynek Spring 2006 © UCBR-Format Instructions (5/5)° Final field:•shamt: This field contains the amount ashift instruction will shift by. Shifting a32-bit word by more than 31 is useless,so this field is only 5 bits (so it canrepresent the numbers 0-31).• This field is set to 0 in all but the shiftinstructions.° For a detailed description of fieldusage for each instruction, see greeninsert in COD 3/e• (You can bring with you to all exams)CS 61C L13 MIPS Instruction Representation I (14) Wawrzynek Spring 2006 © UCBR-Format Example (1/2)° MIPS Instruction:add $8,$9,$10opcode = 0 (look up in table in book)funct = 32 (look up in table in book)rd = 8 (destination)rs = 9 (first operand)rt = 10 (second ope rand)shamt = 0 (not a shift)CS 61C L13 MIPS Instruction Representation I (15) Wawrzynek Spring 2006 © UCBR-Format Example (2/2)° MIPS Instruction:add $8,$9,$100 9 10 8 320Binary number per field representation:• Called a Machine Language InstructionDecimal
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