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Berkeley COMPSCI 61C - Introduction to Synchronous Digital Systems

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CS 61C L20 Introduction to Synchronous Digital Systems (1)Garcia, Fall 2004 © UCBLecturer PSOE Dan Garciawww.cs.berkeley.edu/~ddgarciainst.eecs.berkeley.edu/~cs61cCS61C : Machine Structures Lecture 20 –Introduction to Synchronous Digital Systems 2004-10-15Great new PC HW!⇒ OQO model 01 is thenew, lightest, coolest fully-functional PC on the block. 1GHz,20GB drive, 256MB RAM, wireless,color display, thumb keyboardwhich slides out. Small & light!oqo.comCS 61C L20 Introduction to Synchronous Digital Systems (2)Garcia, Fall 2004 © UCB61CWhat are “Machine Structures”?Coordination of many levels of abstractionI/O systemProcessorCompilerOperatingSystem(MacOS X)Application (Netscape)Digital DesignCircuit DesignInstruction Set ArchitectureDatapath & Control transistorsMemoryHardwareSoftwareAssemblerWe’ll investigate lower abstraction layers!(contract between HW & SW)CS 61C L20 Introduction to Synchronous Digital Systems (3)Garcia, Fall 2004 © UCBBelow the Program• High-level language program (in C) swap int v[], int k){int temp;temp = v[k];v[k] = v[k+1];v[k+1] = temp;}• Assembly language program (for MIPS)swap: sll $2, $5, 2add $2, $4,$2lw $15, 0($2)lw $16, 4($2)sw $16, 0($2)sw $15, 4($2)jr $31• Machine (object) code (for MIPS) 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 . . .C compilerassembler?CS 61C L20 Introduction to Synchronous Digital Systems (4)Garcia, Fall 2004 © UCBLogic Design• Next 2 weeks: we’ll study how amodern processor is built starting withbasic logic elements as buildingblocks.• Why study logic design?• Understand what processors can do fastand what they can’t do fast (avoid slowthings if you want your code to run fast!)• Background for more detailed hardwarecourses (CS 150, CS 152)CS 61C L20 Introduction to Synchronous Digital Systems (5)Garcia, Fall 2004 © UCBLogic Gates• Basic building blocks are logic gates.• In the beginning, did ad hoc designs, andthen saw patterns repeated, gave names• Can build gates with transistors andresistors• Then found theoretical basis for design• Can represent and reason about gates withtruth tables and Boolean algebra• Assume know truth tables and Booleanalgebra from a math or circuits course.• Section B.2 in the textbook has a reviewCS 61C L20 Introduction to Synchronous Digital Systems (6)Garcia, Fall 2004 © UCBPhysical HardwareLet’s look closer…CS 61C L20 Introduction to Synchronous Digital Systems (7)Garcia, Fall 2004 © UCBGate-level view vs. Block diagramA B C0 0 10 1 11 0 11 1 0CS 61C L20 Introduction to Synchronous Digital Systems (8)Garcia, Fall 2004 © UCBSignals and Waveforms: ClocksCS 61C L20 Introduction to Synchronous Digital Systems (9)Garcia, Fall 2004 © UCBSignals and Waveforms: AddersCS 61C L20 Introduction to Synchronous Digital Systems (10)Garcia, Fall 2004 © UCBSignals and Waveforms: GroupingCS 61C L20 Introduction to Synchronous Digital Systems (11)Garcia, Fall 2004 © UCBSignals and Waveforms: Circuit DelayCS 61C L20 Introduction to Synchronous Digital Systems (12)Garcia, Fall 2004 © UCBCombinational Logic• Complex logic blocks are built frombasic AND, OR, NOT building blockswe’ll see shortly.• A combinational logic block is one inwhich the output is a function only ofits current input.• Combinational logic cannot havememory (e.g., a register is not acombinational unit).CS 61C L20 Introduction to Synchronous Digital Systems (13)Garcia, Fall 2004 © UCBCircuits with STATE (e.g., register)CS 61C L20 Introduction to Synchronous Digital Systems (14)Garcia, Fall 2004 © UCBAdministrivia• Midterm coming up on Monday @ 7pmin 1 Pimintel. Heard this enough yet?CS 61C L20 Introduction to Synchronous Digital Systems (15)Garcia, Fall 2004 © UCBPeer InstructionA. SW can peek at HW (past ISAabstraction boundary) for optimizationsB. SW can depend on particular HWimplementation of ISAC. Timing diagrams serve as a criticaldebugging tool in the EE toolkit ABC1: FFF2: FFT3: FTF4: FTT5: TFF6: TFT7: TTF8: TTTCS 61C L20 Introduction to Synchronous Digital Systems (16)Garcia, Fall 2004 © UCBAnd in conclusion…• ISA is very important abstraction layer• Contract between HW and SW• Basic building blocks are logic gates• Clocks control pulse of our circuits• Voltages are analog, quantized to 0/1• Circuit delays are fact of life• Two types• Stateless Combinational Logic (&,|,~)• State circuits (e.g.,


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Berkeley COMPSCI 61C - Introduction to Synchronous Digital Systems

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