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Berkeley COMPSCI 61C - Lecture 19

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inst.eecs.berkeley.edu/~cs61c !UCB$CS61C$:$Machine$Structures$$Lecture$10$–$Introduction$to$MIPS$$Decisions$II$$2008‐02‐13$In$what$may$be$regarded$as$the$most$anticipated$game$in$a$long$time,$EA$will$be$releasing$Maxis’$Spore$on$PCs$/$Macs$/$Nintendo$DS™,$and$mobile$phones$in$the$fall.$Players$will$be$able$to$“create$and$evolve$life,$establish$tribes,$build$civilizations,$sculpt$entire$worlds$and$explore$others’$universes.”$$Lecturer$SOE$Dan$Garcia$www.spore.com Obama$sweeps%8th%state%in%a%row;%it’s%getting%tight!$CS61C$L10$Introduction$to$MIPS$:$Decisions$II$(2)$Garcia,$Spring$2008$©$UCB$Review$ Memory$is$byte‐addressable,$but$lw$and$sw$access$one$word$at$a$time.$ A$pointer$(used$by$lw$and$sw)$is$just$a$memory$address,$so$we$can$add$to$it$or$subtract$from$it$(using$offset).$ A$Decision$allows$us$to$decide$what$to$execute$at$run‐time$rather$than$compile‐time.$ C$Decisions$are$made$using$conditional$statements$within$if,$while,$do while,$for.$ MIPS$Decision$making$instructions$are$the$conditional$branches:$beq$and$bne.$ New$Instructions: lw, sw, beq, bne, jCS61C$L10$Introduction$to$MIPS$:$Decisions$II$(3)$Garcia,$Spring$2008$©$UCB$Last$time:$Loading,$Storing$bytes$1/2$ In$addition$to$word$data$transfers$$(lw,$sw),$MIPS$has$byte$data$transfers:$ load$byte:$lb$ store$byte:$sb$ same$format$as$lw,$sw  E.g.,$$lb $s0, 3($s1)  contents'of'memory'location'with'address'='sum'of'“3”'+'contents'of'register's1'is'copied'to'the'low'byte'position'of'register's0.'CS61C$L10$Introduction$to$MIPS$:$Decisions$II$(4)$Garcia,$Spring$2008$©$UCB$x Loading,$Storing$bytes$2/2$ What$do$with$other$24$bits$in$the$32$bit$register?$ lb:$sign$extends$to$fill$upper$24$bits$byte$loaded$…is$copied$to$“sign‐extend”$This$bit$xxxx xxxx xxxx xxxx xxxx xxxx zzz zzzz  $Normally$don’t$want$to$sign$extend$chars$ $MIPS$instruction$that$doesn’t$$$$sign$extend$when$loading$bytes:$ $load$byte$unsigned:$lbuCS61C$L10$Introduction$to$MIPS$:$Decisions$II$(5)$Garcia,$Spring$2008$©$UCB$Overflow$in$Arithmetic$(1/2)$ Reminder:$Overflow$occurs$when$there$is$a$mistake$in$arithmetic$due$to$the$limited$precision$in$computers.$ Example$(4‐bit$unsigned$numbers):$$$+15$ $ $$$$$$$$$1111$$$$$+3$ $ $$$$$$$$$0011$$ $ +18$ $ $$$$$$$10010$ But$we$don’t$have$room$for$5‐bit$solution,$so$the$solution$would$be$0010,$which$is$+2,$and$wrong.$CS61C$L10$Introduction$to$MIPS$:$Decisions$II$(6)$Garcia,$Spring$2008$©$UCB$Overflow$in$Arithmetic$(2/2)$ Some$languages$detect$overflow$(Ada),$$some$don’t$(C)$ MIPS$solution$is$2$kinds$of$arithmetic$instructs:$ These$cause$overflow$to$be$detected$ add$(add)$ add$immediate$(addi)$$ subtract$(sub)$ These$do$not$cause$overflow$detection$$ add$unsigned$(addu)$ add$immediate$unsigned$(addiu)$$ subtract$unsigned$(subu)$ Compiler$selects$appropriate$arithmetic$ MIPS$C$compilers$produce$addu,$addiu,$subu$CS61C$L10$Introduction$to$MIPS$:$Decisions$II$(7)$Garcia,$Spring$2008$©$UCB$Two$“Logic”$Instructions$ Here$are$2$more$new$instructions$ Shift$Left:$sll $s1,$s2,2 #s1=s2<<2  Store$in$$s1$the$value$from$$s2$shifted$2$bits$to$the$left,$inserting$0’s$on$right;$<<$in$C$ Before:$0000 0002hex$0000 0000 0000 0000 0000 0000 0000 0010two$ After:$$ 0000 0008hex$0000 0000 0000 0000 0000 0000 0000 1000two$ What$arithmetic$effect$does$shift$left$have?$ Shift$Right:$srl$is$opposite$shift;$>>$CS61C$L10$Introduction$to$MIPS$:$Decisions$II$(8)$Garcia,$Spring$2008$©$UCB$Loops$in$C/Assembly$(1/3)$ Simple$loop$in$C;$A[]$is$an$array$of$ints$ do { g = g + A[i]; i = i + j; } while (i != h);  Rewrite$this$as:$ Loop: g = g + A[i]; i = i + j; if (i != h) goto Loop;$ Use$this$mapping:$ g, h, i, j, base of A $s1, $s2, $s3, $s4, $s5CS61C$L10$Introduction$to$MIPS$:$Decisions$II$(9)$Garcia,$Spring$2008$©$UCB$Loops$in$C/Assembly$(2/3)$ Final$compiled$MIPS$code: Loop: sll $t1,$s3,2 # $t1= 4*I addu $t1,$t1,$s5 # $t1=addr A+4i lw $t1,0($t1) # $t1=A[i] addu $s1,$s1,$t1 # g=g+A[i] addu $s3,$s3,$s4 # i=i+j bne $s3,$s2,Loop # goto Loop # if i!=h  Original$code:$ Loop: g = g + A[i]; i = i + j; if (i != h) goto Loop;CS61C$L10$Introduction$to$MIPS$:$Decisions$II$(10)$Garcia,$Spring$2008$©$UCB$Loops$in$C/Assembly$(3/3)$ There$are$three$types$of$loops$in$C:$ while  do… while  for  Each$can$be$rewritten$as$either$of$the$other$two,$so$the$method$used$in$the$previous$example$can$be$applied$to$these$loops$as$well.$ Key$Concept:$Though$there$are$multiple$ways$of$writing$a$loop$in$MIPS,$the$key$to$decision‐making$is$conditional$branch$CS61C$L10$Introduction$to$MIPS$:$Decisions$II$(11)$Garcia,$Spring$2008$©$UCB$Administrivia$ Project$1$due$Friday!$ (ok,$Saturday,$but$tell$your$brain$it’s$Friday!)$ How$useful$was$Faux$Exam$1?$ Other$administrivia?$CS61C$L10$Introduction$to$MIPS$:$Decisions$II$(12)$Garcia,$Spring$2008$©$UCB$Inequalities$in$MIPS$(1/4)$ Until$now,$we’ve$only$tested$equalities$$(== and$!=$in$C).$$General$programs$need$to$test$<$and$>$as$well.$ Introduce$MIPS$Inequality$Instruction:$ “Set$on$Less$Than”$ Syntax:$$$$$$$$$slt reg1,reg2,reg3  Meaning:$$$if (reg2 < reg3) reg1 = 1; else reg1 = 0; $$$$“set”$means$“change$to$1”,$$“reset”$means$“change$to$0”.$reg1 = (reg2 < reg3); Same$thing…$CS61C$L10$Introduction$to$MIPS$:$Decisions$II$(13)$Garcia,$Spring$2008$©$UCB$Inequalities$in$MIPS$(2/4)$ How$do$we$use$this?$Compile$by$hand:$if (g < h) goto Less; #g:$s0,$h:$s1$ Answer:$compiled$MIPS$code… slt $t0,$s0,$s1 # $t0 = 1 if g<h bne $t0,$0,Less # goto Less # if $t0!=0 # (if (g<h)) Less:  Register$$0$always$contains$the$value$0,$so$bne$and$beq$often$use$it$for$comparison$after$an$slt$instruction.$ $$A$slt$$bne$pair$means$if(… < …)goto…$CS61C$L10$Introduction$to$MIPS$:$Decisions$II$(14)$Garcia,$Spring$2008$©$UCB$Inequalities$in$MIPS$(3/4)$ Now$we$can$implement$<,$$but$how$do$we$implement$>,$≤$and$≥$?$ We$could$add$3$more$instructions,$but:$ MIPS$goal:$Simpler$is$Better$ Can$we$implement$≤$in$one$or$more$instructions$using$just$slt$and$branches?$ What$about$>?$


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Berkeley COMPSCI 61C - Lecture 19

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