inst eecs berkeley edu cs61c CS61C Machine Structures Lecture 20 Introduction to Synchronous Digital Systems Lecturer PSOE Dan Garcia www cs berkeley edu ddgarcia NY Public Library They ve digitized their collection and put 275 000 images online Manuscripts historical maps vintage posters rare prints photos illustrated books more CS61C L20 Introduction to Synchronous Digital Systems 1 www nypl org Garcia UCB What are Machine Structures Application Netscape Software Hardware Compiler Assembler Operating System MacOS X Processor Memory I O system 61C Instruction Set Architecture Datapath Control Digital Design Circuit Design transistors Coordination of many levels of abstraction We ll investigate lower abstraction layers contract between HW SW CS61C L20 Introduction to Synchronous Digital Systems 2 Garcia UCB Below the Program High level language program in C swap int v int k int temp temp v k v k v k 1 v k 1 temp C compiler Assembly language program for MIPS swap sll 2 5 2 add 2 4 2 lw 15 0 2 lw 16 4 2 sw 16 0 2 sw 15 4 2 jr 31 assembler Machine object code for MIPS 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 CS61C L20 Introduction to Synchronous Digital Systems 3 Garcia UCB Logic Design Next 2 weeks we ll study how a modern processor is built starting with basic logic elements as building blocks Why study logic design Understand what processors can do fast and what they can t do fast avoid slow things if you want your code to run fast Background for more detailed hardware courses CS 150 CS 152 CS61C L20 Introduction to Synchronous Digital Systems 4 Garcia UCB Logic Gates Basic building blocks are logic gates In the beginning did ad hoc designs and then saw patterns repeated gave names Can build gates with transistors and resistors Then found theoretical basis for design Can represent and reason about gates with truth tables and Boolean algebra Assume know truth tables and Boolean algebra from a math or circuits course Section B 2 in the textbook has a review CS61C L20 Introduction to Synchronous Digital Systems 5 Garcia UCB Physical Hardware Let s look closer CS61C L20 Introduction to Synchronous Digital Systems 6 Garcia UCB Gate level view vs Block diagram A 0 0 1 1 B 0 1 0 1 CS61C L20 Introduction to Synchronous Digital Systems 7 C 1 1 1 0 Garcia UCB Signals and Waveforms Clocks CS61C L20 Introduction to Synchronous Digital Systems 8 Garcia UCB Signals and Waveforms Adders CS61C L20 Introduction to Synchronous Digital Systems 9 Garcia UCB Signals and Waveforms Grouping CS61C L20 Introduction to Synchronous Digital Systems 10 Garcia UCB Signals and Waveforms Circuit Delay CS61C L20 Introduction to Synchronous Digital Systems 11 Garcia UCB Combinational Logic Complex logic blocks are built from basic AND OR NOT building blocks we ll see shortly A combinational logic block is one in which the output is a function only of its current input Combinational logic cannot have memory e g a register is not a combinational unit CS61C L20 Introduction to Synchronous Digital Systems 12 Garcia UCB Circuits with STATE e g register CS61C L20 Introduction to Synchronous Digital Systems 13 Garcia UCB Administrivia Midterm tonight 7pm in 1 Le Conte Heard this enough yet CS61C L20 Introduction to Synchronous Digital Systems 14 Garcia UCB Peer Instruction ABC A SW can peek at HW past ISA FFF abstraction boundary for optimizations 1 2 FFT 3 FTF B SW can depend on particular HW 4 FTT implementation of ISA 5 TFF C Timing diagrams serve as a critical debugging tool in the EE toolkit CS61C L20 Introduction to Synchronous Digital Systems 15 6 TFT 7 TTF 8 TTT Garcia UCB And in conclusion ISA is very important abstraction layer Contract between HW and SW Basic building blocks are logic gates Clocks control pulse of our circuits Voltages are analog quantized to 0 1 Circuit delays are fact of life Two types Stateless Combinational Logic State circuits e g registers CS61C L20 Introduction to Synchronous Digital Systems 16 Garcia UCB
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