inst eecs berkeley edu cs61c Clarification IEEE Four Rounding Modes CS61C Machine Structures Round This is towards just an example in base 10 to show you round the 4 up modes ALWAYS 2 1 3 2 1 2 What really happens is Round towards 1 in binary not decimal ALWAYS round 1 9 with 1 1 9 2 at the lowest bit of down the mantissa the 2 Lecture 17 Introduction to MIPS Instruction Representation III Lecturer PSOE Dan Garcia www cs berkeley edu ddgarcia Digital film network The UK is investing in 150 digital cinemas Each will get a 100 GiB lossless digital copy of the film and show it on digital 2K 2048x1080 projectors USA news bbc co uk 1 hi technology 4297865 stm CS61C L17 Introduction to MIPS Instruction R epresentation III 1 Garcia U CB Outline guard bit s as our extra bit s and you need Truncate to decide how extra bit s towards affect the Just drop thethese last bits round 0 result if the guard bits are 100 Round to nearest default 3 If so you re half wayeven between the Normal rounding almost 2 5 2 3 5 4 representable numbers Like youislearned in grade school E g 0 1010 5 8 halfway between our representable 4 8 1 2 and 6 8 3 4 Which Insures fairness on calculation number we we round to up 4 modes Half thedotime round other half down CS61C L17 Introduction to MIPS Instruction R epresentation III 2 Garcia U CB Decoding Machine Language How do we convert 1s and 0s to C code Machine language C Disassembly Pseudoinstructions and True Assembly Language TAL v MIPS Assembly Language MAL For each 32 bits Look at opcode 0 means R Format 2 or 3 mean J Format otherwise I Format Use instruction type to determine which fields exist Write out MIPS assembly code converting each field to name register number name or decimal hex number CS61C L17 Introduction to MIPS Instruction R epresentation III 3 Garcia U CB Logically convert this MIPS code into valid C code Always possible Unique CS61C L17 Introduction to MIPS Instruction R epresentation III 4 Decoding Example 1 7 Decoding Example 2 7 Here are six machine language instructions in hexadecimal The six machine language instructions in binary 00000000000000000001000000100101 00000000000001010100000000101010 00010001000000000000000000000011 00000000010001000001000000100000 00100000101001011111111111111111 00001000000100000000000000000001 00001025hex 0005402Ahex 11000003hex 00441020hex 20A5FFFFhex 08100001hex Next step identify opcode and format Let the first instruction be at address 4 194 304ten 0x00400000hex R 0 I 1 4 31 J 2 or 3 Next step convert hex to binary CS61C L17 Introduction to MIPS Instruction R epresentation III 5 Garcia U CB Garcia U CB rs rs rt rd shamt funct rt immediate target address CS61C L17 Introduction to MIPS Instruction R epresentation III 6 Garcia U CB Decoding Example 3 7 Select the opcode first 6 bits to determine the format Decoding Example 4 7 Fields separated based on format opcode Format R R I R I J Format R R I R 00000000000000000001000000100101 00000000000001010100000000101010 00010001000000000000000000000011 00000000010001000001000000100000 00100000101001011111111111111111 00001000000100000000000000000001 I J Look at opcode 0 means R Format 2 or 3 mean J Format otherwise I Format 0 0 4 0 8 2 0 0 8 2 5 0 5 0 4 5 2 8 2 0 0 3 0 1 37 42 32 1 048 577 Next step translate disassemble to MIPS assembly instructions Next step separation of fields CS61C L17 Introduction to MIPS Instruction R epresentation III 7 Garcia U CB CS61C L17 Introduction to MIPS Instruction R epresentation III 8 Decoding Example 5 7 Decoding Example 6 7 MIPS Assembly Part 1 MIPS Assembly Part 2 Address Assembly instructions 0x00400000 0x00400004 0x00400008 0x0040000c 0x00400010 0x00400014 or slt beq add addi j 2 0 0 8 0 5 8 0 3 2 2 4 5 5 1 0x100001 Loop Better solution translate to more meaningful MIPS instructions fix the branch jump and add labels registers CS61C L17 Introduction to MIPS Instruction R epresentation III 9 Garcia U CB Decoding Example 7 7 After C code Mapping below Exit or slt beq add addi j Garcia U CB v0 0 0 t0 0 a1 t0 0 Exit v0 v0 a0 a1 a1 1 Loop Next step translate to C code be creative CS61C L17 Introduction to MIPS Instruction R epresentation III 10 Garcia U CB Administrivia Before Hex 00001025hex 0005402Ahex 11000003hex 00441020hex 20A5FFFFhex 08100001hex or Loop slt beq add addi j Exit v0 product a0 multiplicand a1 multiplier SIGCSE 2005 was GREAT product 0 while multiplier 0 product multiplicand multiplier 1 v0 0 0 t0 0 a1 t0 0 Exit v0 v0 a0 a1 a1 1 Loop Thanks to TAs who filled in last week Your midterm is in 7 days Demonstrated Big 61C Idea Instructions are just numbers code is treated like data CS61C L17 Introduction to MIPS Instruction R epresentation III 11 Garcia U CB CS61C L17 Introduction to MIPS Instruction R epresentation III 12 Garcia U CB Review from before lui So how does lui help us True Assembly Language 1 3 Pseudoinstruction A MIPS instruction that doesn t turn directly into a machine language instruction but into other MIPS instrucitons Example addi becomes lui ori add t0 t0 0xABABCDCD What happens with pseudoinstructions at 0xABAB at at 0xCDCD t0 t0 at Now each I format instruction has only a 16bit immediate Wouldn t it be nice if the assembler would this for us automatically They re broken up by the assembler into several real MIPS instructions But what is a real MIPS instruction Answer in a few slides First some examples If number too big then just automatically replace addi with lui ori add CS61C L17 Introduction to MIPS Instruction R epresentation III 13 Garcia U CB Example Pseudoinstructions Problem move reg2 reg1 Expands to add reg2 zero reg1 When breaking up a pseudoinstruction the assembler may need to use an extra reg If it uses any regular register it ll overwrite whatever the program has put into it Load Immediate li reg value If value fits in 16 bits addi reg zero value else lui reg upper 16 bits of value ori reg zero lower 16 bits CS61C L17 Introduction to MIPS Instruction R epresentation III 15 Solution Reserve a register 1 called at for assembler temporary that assembler will use to break up pseudo instructions Since the assembler may use this at any time it s not safe to code with it Garcia U CB Example Pseudoinstructions Garcia U CB Wrong operation for operand addu value reg reg value should be addiu If value fits in 16 bits addu is changed to addiu reg reg value else lui at upper 16 bits of value ori at at lower 16 bits addu reg reg at 0 0 No OPeration instruction nop Expands to instruction
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