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Berkeley COMPSCI 61C - Lecture Notes

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CS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (1) Garcia © U CBLecturer PSOE Dan Garciawww.cs.berkeley.edu/~ddgarciainst.eecs.berkeley.edu/~cs61cCS61C : Machine Structures Lecture 17 – Introduction to MIPS Instruction Representation IIIDigital film network ⇒ The UK is investing in150 digital cinemas! Each will geta 100 GiB lossless digital copy ofthe film and show it on digital 2K(2048x1080) projectors. USA?!news.bbc.co.uk/1/hi/technology/4297865.stmCS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (2) Garcia © U CBClarification - IEEE Four Rounding Modes• Round towards + ∞• ALWAYS round “up”: 2.1 ⇒ 3, -2.1 ⇒ -2• Round towards - ∞• ALWAYS round “down”: 1.9 ⇒ 1, -1.9 ⇒ -2• Truncate• Just drop the last bits (round towards 0)• Round to (nearest) even (default)• Normal rounding, almost: 2.5 ⇒ 2, 3.5 ⇒ 4• Like you learned in grade school• Insures fairness on calculation• Half the time we round up, other half down• This is just an example in base 10 toshow you the 4 modes.• What really happens is…1) in binary, not decimal!2) at the lowest bit of the mantissa with theguard bit(s) as our extra bit(s), and you needto decide how these extra bit(s) affect theresult if the guard bits are “100…”3) If so, you’re half-way between therepresentable numbers.E.g., 0.1010 is 5/8, halfway between ourrepresentable 4/8 [1/2] and 6/8 [3/4]. Whichnumber do we round to? 4 modes!CS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (3) Garcia © U CBOutline• Disassembly• Pseudoinstructions and“True” Assembly Language (TAL) v.“MIPS” Assembly Language (MAL)CS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (4) Garcia © U CBDecoding Machine Language• How do we convert 1s and 0s to C code?Machine language ⇒ C?• For each 32 bits:• Look at opcode: 0 means R-Format, 2 or 3mean J-Format, otherwise I-Format.• Use instruction type to determine whichfields exist.• Write out MIPS assembly code, convertingeach field to name, register number/name,or decimal/hex number.• Logically convert this MIPS code into validC code. Always possible? Unique?CS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (5) Garcia © U CBDecoding Example (1/7)• Here are six machine languageinstructions in hexadecimal:00001025hex0005402Ahex11000003hex00441020hex20A5FFFFhex08100001hex• Let the first instruction be at address4,194,304ten (0x00400000hex).• Next step: convert hex to binaryCS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (6) Garcia © U CBDecoding Example (2/7)• The six machine language instructions inbinary: 000000000000000000010000001001010000000000000101010000000010101000010001000000000000000000000011000000000100010000010000001000000010000010100101111111111111111100001000000100000000000000000001• Next step: identify opcode and format1, 4-31 rs rt immediate0 rs rt rd functshamtRIJ target address2 or 3CS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (7) Garcia © U CBDecoding Example (3/7)• Select the opcode (first 6 bits)to determine the format: 000000000000000000010000001001010000000000000101010000000010101000010001000000000000000000000011000000000100010000010000001000000010000010100101111111111111111100001000000100000000000000000001• Look at opcode:0 means R-Format,2 or 3 mean J-Format,otherwise I-Format.• "Next step: separation of fieldsRRIRIJFormat:CS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (8) Garcia © U CBDecoding Example (4/7)• Fields separated based on format/opcode:0 0 0 2 3700 0 5 8 4204 8 0 +30 2 4 2 3208 5 5 -12 1,048,577• Next step: translate (“disassemble”)to MIPS assembly instructionsRRIRIJFormat:CS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (9) Garcia © U CBDecoding Example (5/7)• MIPS Assembly (Part 1):Address: Assembly instructions:0x00400000 or $2,$0,$00x00400004 slt $8,$0,$50x00400008 beq $8,$0,30x0040000c add $2,$2,$40x00400010 addi $5,$5,-10x00400014 j 0x100001• Better solution: translate to moremeaningful MIPS instructions (fix thebranch/jump and add labels, registers)CS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (10) Garcia © U CBDecoding Example (6/7)• MIPS Assembly (Part 2):or $v0,$0,$0Loop: slt $t0,$0,$a1beq $t0,$0,Exitadd $v0,$v0,$a0addi $a1,$a1,-1j LoopExit:• Next step: translate to C code(be creative!)CS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (11) Garcia © U CBDecoding Example (7/7)• After C code (Mapping below)$v0: product$a0: multiplicand$a1: multiplierproduct = 0;while (multiplier > 0) {product += multiplicand;multiplier -= 1;}Before Hex:00001025hex0005402Ahex11000003hex00441020hex20A5FFFFhex 08100001hexDemonstrated Big 61CIdea: Instructions arejust numbers, code istreated like data or $v0,$0,$0Loop: slt $t0,$0,$a1 beq $t0,$0,Exit add $v0,$v0,$a0 addi $a1,$a1,-1 j LoopExit:CS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (12) Garcia © U CBAdministrivia• Thanks to TAs who filled in last week• SIGCSE 2005 was GREAT• Your midterm is in 7 days!CS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (13) Garcia © U CBReview from before: lui• So how does lui help us?• Example:addi $t0,$t0, 0xABABCDCDbecomes:lui $at, 0xABABori $at, $at, 0xCDCDadd $t0,$t0,$at• Now each I-format instruction has only a 16-bit immediate.• Wouldn’t it be nice if the assemblerwould this for us automatically?- If number too big, then just automaticallyreplace addi with lui, ori, addCS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (14) Garcia © U CBTrue Assembly Language (1/3)• Pseudoinstruction: A MIPS instructionthat doesn’t turn directly into a machinelanguage instruction, but into otherMIPS instrucitons• What happens with pseudoinstructions?• They’re broken up by the assembler intoseveral “real” MIPS instructions.• But what is a “real” MIPS instruction?Answer in a few slides• First some examplesCS61C L17 Introduction to MIPS: Ins truction Repres entat ion III (15) Garcia © U CBExample Pseudoinstructions• Register Movemove reg2,reg1Expands to:add reg2,$zero,reg1• Load Immediateli reg,valueIf value fits in 16 bits:addi reg,$zero,valueelse:lui reg,upper 16 bits of valueori reg,$zero,lower 16 bitsCS61C L17


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Berkeley COMPSCI 61C - Lecture Notes

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