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Berkeley COMPSCI 61C - Lecture 14 ­ Input/Output

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CS61C - Machine Structures Lecture 14 - Input/OutputOutlineAnatomy: 5 components of any ComputerMotivation for Input/OutputI/O Device Examples and SpeedsInstruction Set Architecture for I/OProcessor-I/O Speed MismatchProcessor Checks Status before ActingSPIM I/O SimulationSPIM I/OI/O ExampleAdministrivia (1/2)Administrivia (2/2)Cost of Polling?% Processor time to poll mouse, floppy% Processor time to hard diskWhat is the alternative to polling?I/O InterruptDefinitions for ClarificationInterrupt Driven Data TransferInstruction Set Support for I/O InterruptSlide 22SPIM I/O Simulation: Interrupt Driven I/OBenefit of Interrupt-Driven I/OQuestions Raised about Interrupts4 Responsibilities leading to OS4 Functions OS must provideThings to RememberCS 61C L14 I/O.1Liu Summer 00 ©UCBCS61C - Machine StructuresLecture 14 - Input/Output July 12, 2000Brenda Liuhttp://www-inst.eecs.berkeley.edu/~cs61c/CS 61C L14 I/O.2Liu Summer 00 ©UCBOutline°I/O Background°Polling°InterruptsCS 61C L14 I/O.3Liu Summer 00 ©UCBAnatomy: 5 components of any Computer Processor (active)ComputerControl(“brain”)Datapath(“brawn”)Memory(passive)(where programs, data live whenrunning)DevicesInputOutputKeyboard, MouseDisplay, PrinterDisk (where programs, data live when not running)CS 61C L14 I/O.4Liu Summer 00 ©UCBMotivation for Input/Output°I/O is how humans interact with computers°Computer without I/O like a car without wheels; great technology, but won’t get you anywhereCS 61C L14 I/O.5Liu Summer 00 ©UCBI/O Device Examples and Speeds°I/O Speed: bytes transferred per second(from mouse to display: million-to-1) °Device Behavior Partner Data Rate (Kbytes/sec)Keyboard Input Human 0.01Mouse Input Human 0.02Line Printer Output Human 1.00Floppy disk Storage Machine 50.00Laser Printer Output Human 100.00Magnetic Disk Storage Machine 10,000.00Network-LAN I or O Machine 10,000.00Graphics Display Output Human 30,000.00CS 61C L14 I/O.6Liu Summer 00 ©UCBInstruction Set Architecture for I/O°Some machines have special input and output instructions°Alternative model (used by MIPS):•Input: ~ reads a sequence of bytes •Output: ~ writes a sequence of bytes°Memory also a sequence of bytes, so use loads for input, stores for output•Called “Memory Mapped Input/Output”•A portion of the address space dedicated to communication paths to Input or Output devices (no memory there)CS 61C L14 I/O.7Liu Summer 00 ©UCBProcessor-I/O Speed Mismatch°500 MHz microprocessor can execute 500 million load or store instructions per second, or 2,000,000 KB/s data rate•I/O devices from 0.01 KB/s to 30,000 KB/s°Input: device may not be ready to send data as fast as the processor loads it•Also, might be waiting for human to act°Output: device may not be ready to accept data as fast as processor stores it°What to do?CS 61C L14 I/O.8Liu Summer 00 ©UCBProcessor Checks Status before Acting°Path to device generally has 2 registers:•1 register says it’s OK to read/write (I/O ready), often called Control Register•1 register that contains data, often called Data Register°Processor reads from Control Register in loop, waiting for device to set Ready bit in Control reg to say its OK (0  1)°Processor then loads from (input) or writes to (output) data register•Load from device/Store into Data Register resets Ready bit (1  0) of Control RegisterCS 61C L14 I/O.9Liu Summer 00 ©UCBSPIM I/O Simulation°SPIM simulates 1 I/O device: memory-mapped terminal (keyboard + display)•Read from keyboard (receiver); 2 device regs•Writes to terminal (transmitter); 2 device regsReceived ByteReceiver Data0xffff0004Unused (00...00)(IE)Receiver Control0xffff0000Ready(I.E.)Unused (00...00)TransmittedByteTransmitter Control0xffff0008Transmitter Data0xffff000cReady(I.E.)Unused (00...00)UnusedCS 61C L14 I/O.10Liu Summer 00 ©UCBSPIM I/O°Control register rightmost bit (0): Ready•Receiver: Ready==1 means character in Data Register not yet been read; 1 0 when data is read from Data Reg•Transmitter: Ready==1 means transmitter is ready to accept a new character;0  Transmitter still busy writing last char-I.E. bit discussed later°Data register rightmost byte has data•Receiver: last char from keyboard; rest = 0•Transmitter: when write rightmost byte, writes char to displayCS 61C L14 I/O.11Liu Summer 00 ©UCBI/O Example°Input: Read from keyboard into $v0lui $t0, 0xffff #ffff0000Waitloop: lw $t1, 0($t0) #controlandi $t1,$t1,0x0001beq $t1,$zero, Waitlooplw $v0, 4($t0) #data°Output: Write to display from $a0lui $t0, 0xffff #ffff0000Waitloop: lw $t1, 8($t0) #controlandi $t1,$t1,0x0001beq $t1,$zero, Waitloopsw $a0, 12($t0) #data°Processor waiting for I/O called “Polling”CS 61C L14 I/O.12Liu Summer 00 ©UCBAdministrivia (1/2)°Midterm will be next Monday 11-1pm•Review: Sunday 7/16 2-5 306 Soda•Conflict? E-mail brendal@eecs ASAP•Material up to and including yesterday’s lecture•Sample midterm hand out tomorrow °Proj1 grading done•Run ‘glookup’ to see how you didCS 61C L14 I/O.13Liu Summer 00 ©UCBAdministrivia (2/2)°Project 3 immediate printing:•If the immediate is a signed number, print it out in decimal (addi, slti, etc) •If the immediate is an unsigned number (but not an address), print it out in hex without padding (andi, ori, etc)•If the immediate is an address, print it out in hex and pad 0's in front of it to make a total of 8 hex digits (beq, j, etc)°Reading assignment:•None, study for midtermCS 61C L14 I/O.14Liu Summer 00 ©UCBCost of Polling?°Assume for a processor with a 500-MHz clock it takes 400 clock cycles for a polling operation (call polling routine, accessing the device, and returning). Determine % of processor time for polling•Mouse: polled 30 times/sec so as not to miss user movement•Floppy disk: transfers data in 2-byte units and has a data rate of 50 KB/second. No data transfer can be missed.•Hard disk: transfers data in 16-byte chunks and can transfer at 8 MB/second. Again, no transfer can be missed.CS 61C L14 I/O.15Liu Summer 00 ©UCB% Processor time to poll mouse, floppy°Mouse Polling Clocks/sec = 30 * 400 = 12000 clocks/sec°% Processor for polling: 12*103/500*106 = 0.002%Polling mouse little impact on processor°Times Polling Floppy/sec = 50 KB/s /2B = 25K polls/sec°Floppy Polling Clocks/sec= 25K * 400 = 10,000,000 clocks/sec°% Processor for polling: 10*106/500*106 = 2%OK if not too


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Berkeley COMPSCI 61C - Lecture 14 ­ Input/Output

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