DOC PREVIEW
Berkeley COMPSCI 61C - Lecture Notes

This preview shows page 1 out of 4 pages.

Save
View full document
View full document
Premium Document
Do you want full access? Go Premium and unlock all 4 pages.
Access to all documents
Download any document
Ad free experience
Premium Document
Do you want full access? Go Premium and unlock all 4 pages.
Access to all documents
Download any document
Ad free experience

Unformatted text preview:

CS61C L13 Introduction to MIPS: Ins truction Representat ion I (1) Garcia © U CBLecturer PSOE Dan Garciawww.cs.berkeley.edu/~ddgarciainst.eecs.berkeley.edu/~cs61cCS61C : Machine Structures Lecture 13 – Introduction to MIPS Instruction Representation IAnyone seen Terminator? ⇒ Military wants robot soldiers.Let’s see, they get to grow their budgets,and they intent to (years from now) useBerkeley’s smart dust. Be very afraid.www.nytimes.com/2005/02/16/technology/16robots.htmlCS61C L13 Introduction to MIPS: Ins truction Representat ion I (2) Garcia © U CBOverview – Instruction Representation• Big idea: stored program• consequences of stored program• Instructions as numbers• Instruction encoding• MIPS instruction format for Addinstructions• MIPS instruction format forImmediate, Data transfer instructionsCS61C L13 Introduction to MIPS: Ins truction Representat ion I (3) Garcia © U CBBig Idea: Stored-Program Concept• Computers built on 2 key principles:1) Instructions are represented asnumbers.2) Therefore, entire programs can bestored in memory to be read or written just like numbers (data).• Simplifies SW/HW of computer systems:• Memory technology for data alsoused for programsCS61C L13 Introduction to MIPS: Ins truction Representat ion I (4) Garcia © U CBConsequence #1: Everything Addressed• Since all instructions and data are storedin memory as numbers, everything has amemory address: instructions, data words• both branches and jumps use these• C pointers are just memory addresses:they can point to anything in memory• Unconstrained use of addresses can lead tonasty bugs; up to you in C; limits in Java• One register keeps address of instructionbeing executed: “Program Counter” (PC)• Basically a pointer to memory: Intel calls itInstruction Address Pointer, a better nameCS61C L13 Introduction to MIPS: Ins truction Representat ion I (5) Garcia © U CBConsequence #2: Binary Compatibility• Programs are distributed in binary form• Programs bound to specific instruction set• Different version for Macintoshes and PCs• New machines want to run old programs(“binaries”) as well as programs compiledto new instructions• Leads to instruction set evolving over time• Selection of Intel 8086 in 1981 for 1st IBMPC is major reason latest PCs still use80x86 instruction set (Pentium 4); couldstill run program from 1981 PC todayCS61C L13 Introduction to MIPS: Ins truction Representat ion I (6) Garcia © U CBInstructions as Numbers (1/2)• Currently all data we work with is inwords (32-bit blocks):• Each register is a word.•lw and sw both access memory oneword at a time.• So how do we represent instructions?• Remember: Computer only understands1s and 0s, so “add $t0,$0,$0” ismeaningless.• MIPS wants simplicity: since data is inwords, make instructions be words tooCS61C L13 Introduction to MIPS: Ins truction Representat ion I (7) Garcia © U CBInstructions as Numbers (2/2)• One word is 32 bits, so divideinstruction word into “fields”.• Each field tells computer somethingabout instruction.• We could define different fields foreach instruction, but MIPS is basedon simplicity, so define 3 basic typesof instruction formats:• R-format• I-format• J-formatCS61C L13 Introduction to MIPS: Ins truction Representat ion I (8) Garcia © U CBInstruction Formats• I-format: used for instructions withimmediates, lw and sw (since the offsetcounts as an immediate), and thebranches (beq and bne),• (but not the shift instructions; later)• J-format: used for j and jal• R-format: used for all other instructions• It will soon become clear why theinstructions have been partitioned inthis way.CS61C L13 Introduction to MIPS: Ins truction Representat ion I (9) Garcia © U CBR-Format Instructions (1/5)• Define “fields” of the following numberof bits each: 6 + 5 + 5 + 5 + 5 + 6 = 326 5 5 5 65opcode rs rt rd functshamt• For simplicity, each field has a name:• Important: On these slides and inbook, each field is viewed as a 5- or 6-bit unsigned integer, not as part of a32-bit integer.• Consequence: 5-bit fields can representany number 0-31, while 6-bit fields canrepresent any number 0-63.CS61C L13 Introduction to MIPS: Ins truction Representat ion I (10) Garcia © U CBR-Format Instructions (2/5)• What do these field integer values tell us?•opcode: partially specifies what instructionit is- Note: This number is equal to 0 for all R-Formatinstructions.•funct: combined with opcode, this numberexactly specifies the instruction• Question: Why aren’t opcode and funct asingle 12-bit field?- Answer: We’ll answer this later.CS61C L13 Introduction to MIPS: Ins truction Representat ion I (11) Garcia © U CBR-Format Instructions (3/5)• More fields:•rs (Source Register): generally used tospecify register containing first operand•rt (Target Register): generally used tospecify register containing secondoperand (note that name is misleading)•rd (Destination Register): generallyused to specify register which willreceive result of computationCS61C L13 Introduction to MIPS: Ins truction Representat ion I (12) Garcia © U CBR-Format Instructions (4/5)• Notes about register fields:• Each register field is exactly 5 bits, whichmeans that it can specify any unsignedinteger in the range 0-31. Each of thesefields specifies one of the 32 registers bynumber.• The word “generally” was used becausethere are exceptions that we’ll see later.E.g.,- mult and div have nothing important in therd field since the dest registers are hi and lo- mfhi and mflo have nothing important in thers and rt fields since the source isdetermined by the instruction (p. 264 P&H)CS61C L13 Introduction to MIPS: Ins truction Representat ion I (13) Garcia © U CBR-Format Instructions (5/5)• Final field:•shamt: This field contains the amount ashift instruction will shift by. Shifting a32-bit word by more than 31 is useless,so this field is only 5 bits (so it canrepresent the numbers 0-31).• This field is set to 0 in all but the shiftinstructions.• For a detailed description of fieldusage for each instruction, see greeninsert in COD 3/e• (You can bring with you to all exams)CS61C L13 Introduction to MIPS: Ins truction Representat ion I (14) Garcia © U CBR-Format Example (1/2)• MIPS Instruction:add $8,$9,$10opcode = 0 (look up in table in book)funct = 32 (look up in table in book)rd = 8 (destination)rs = 9 (first


View Full Document

Berkeley COMPSCI 61C - Lecture Notes

Documents in this Course
SIMD II

SIMD II

8 pages

Midterm

Midterm

7 pages

Lecture 7

Lecture 7

31 pages

Caches

Caches

7 pages

Lecture 9

Lecture 9

24 pages

Lecture 1

Lecture 1

28 pages

Lecture 2

Lecture 2

25 pages

VM II

VM II

4 pages

Midterm

Midterm

10 pages

Load more
Download Lecture Notes
Our administrator received your request to download this document. We will send you the file to your email shortly.
Loading Unlocking...
Login

Join to view Lecture Notes and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view Lecture Notes 2 2 and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?