inst eecs berkeley edu cs61c Overview Instruction Representation Lecture 13 Introduction to MIPS Instruction Representation I Big idea stored program CS61C Machine Structures consequences of stored program Instructions as numbers Lecturer PSOE Dan Garcia Instruction encoding www cs berkeley edu ddgarcia Anyone seen Terminator Military wants robot soldiers Let s see they get to grow their budgets and they intent to years from now use Berkeley s smart dust Be very afraid MIPS instruction format for Add instructions MIPS instruction format for Immediate Data transfer instructions www nytimes com 2005 02 16 technology 16robots html CS61C L13 Introduction to MIPS Instruction R epresentation I 1 Garcia U CB Big Idea Stored Program Concept CS61C L13 Introduction to MIPS Instruction R epresentation I 2 Garcia U CB Consequence 1 Everything Addressed Since all instructions and data are stored in memory as numbers everything has a memory address instructions data words Computers built on 2 key principles 1 Instructions are represented as numbers 2 Therefore entire programs can be stored in memory to be read or written just like numbers data both branches and jumps use these C pointers are just memory addresses they can point to anything in memory Simplifies SW HW of computer systems Memory technology for data also used for programs Unconstrained use of addresses can lead to nasty bugs up to you in C limits in Java One register keeps address of instruction being executed Program Counter PC Basically a pointer to memory Intel calls it Instruction Address Pointer a better name CS61C L13 Introduction to MIPS Instruction R epresentation I 3 Garcia U CB Consequence 2 Binary Compatibility Programs are distributed in binary form Garcia U CB Instructions as Numbers 1 2 Programs bound to specific instruction set Different version for Macintoshes and PCs New machines want to run old programs binaries as well as programs compiled to new instructions Leads to instruction set evolving over time Selection of Intel 8086 in 1981 for 1st IBM PC is major reason latest PCs still use 80x86 instruction set Pentium 4 could still run program from 1981 PC today CS61C L13 Introduction to MIPS Instruction R epresentation I 5 CS61C L13 Introduction to MIPS Instruction R epresentation I 4 Garcia U CB Currently all data we work with is in words 32 bit blocks Each register is a word lw and sw both access memory one word at a time So how do we represent instructions Remember Computer only understands 1s and 0s so add t0 0 0 is meaningless MIPS wants simplicity since data is in words make instructions be words too CS61C L13 Introduction to MIPS Instruction R epresentation I 6 Garcia U CB Instructions as Numbers 2 2 Instruction Formats One word is 32 bits so divide instruction word into fields I format used for instructions with immediates lw and sw since the offset counts as an immediate and the branches beq and bne Each field tells computer something about instruction but not the shift instructions later We could define different fields for each instruction but MIPS is based on simplicity so define 3 basic types of instruction formats J format used for j and jal R format used for all other instructions It will soon become clear why the instructions have been partitioned in this way R format I format J format CS61C L13 Introduction to MIPS Instruction R epresentation I 7 Garcia U CB R Format Instructions 1 5 Define fields of the following number of bits each 6 5 5 5 5 6 32 6 5 5 5 5 6 rs rt rd shamt funct Important On these slides and in book each field is viewed as a 5 or 6bit unsigned integer not as part of a 32 bit integer Consequence 5 bit fields can represent any number 0 31 while 6 bit fields can represent any number 0 63 CS61C L13 Introduction to MIPS Instruction R epresentation I 9 R Format Instructions 2 5 What do these field integer values tell us opcode partially specifies what instruction it is Garcia U CB funct combined with opcode this number exactly specifies the instruction Question Why aren t opcode and funct a single 12 bit field Answer We ll answer this later CS61C L13 Introduction to MIPS Instruction R epresentation I 10 R Format Instructions 3 5 R Format Instructions 4 5 More fields Notes about register fields rs Source Register generally used to specify register containing first operand rt Target Register generally used to specify register containing second operand note that name is misleading rd Destination Register generally used to specify register which will receive result of computation CS61C L13 Introduction to MIPS Instruction R epresentation I 11 Garcia U CB Note This number is equal to 0 for all R Format instructions For simplicity each field has a name opcode CS61C L13 Introduction to MIPS Instruction R epresentation I 8 Garcia U CB Each register field is exactly 5 bits which means that it can specify any unsigned integer in the range 0 31 Each of these fields specifies one of the 32 registers by number The word generally was used because there are exceptions that we ll see later E g mult and div have nothing important in the rd field since the dest registers are hi and lo mfhi and mflo have nothing important in the rs and rt fields since the source is determined by the instruction p 264 P H Garcia U CB CS61C L13 Introduction to MIPS Instruction R epresentation I 12 Garcia U CB R Format Instructions 5 5 R Format Example 1 2 Final field MIPS Instruction shamt This field contains the amount a shift instruction will shift by Shifting a 32 bit word by more than 31 is useless so this field is only 5 bits so it can represent the numbers 0 31 This field is set to 0 in all but the shift instructions add 8 9 10 opcode 0 look up in table in book funct 32 look up in table in book rd 8 destination rs 9 first operand rt 10 second operand For a detailed description of field usage for each instruction see green insert in COD 3 e shamt 0 not a shift You can bring with you to all exams CS61C L13 Introduction to MIPS Instruction R epresentation I 13 Garcia U CB CS61C L13 Introduction to MIPS Instruction R epresentation I 14 R Format Example 2 2 Administrivia MIPS Instruction Project 1 due Friday add 8 9 10 Homework 4 online soon Decimal number per field representation Andy is the TA in charge It s only book exercises 0 9 10 8 0 32 Binary number per field representation Dan s OH cancelled next week 000000 01001 01010 01000 00000 100000 hex representation decimal representation Garcia U CB 012A 4020hex 19 546
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