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Berkeley COMPSCI 61C - Lecture Notes

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PowerPoint PresentationReview…Big Endian vs. Little EndianMemorized this table yet?How Much Information IS that?Block Size Tradeoff (1/3)Block Size Tradeoff (2/3)Block Size Tradeoff (3/3)Extreme Example: One Big BlockBlock Size Tradeoff ConclusionsTypes of Cache Misses (1/2)Types of Cache Misses (2/2)Fully Associative Cache (1/3)Fully Associative Cache (2/3)Fully Associative Cache (3/3)Third Type of Cache MissN-Way Set Associative Cache (1/4)N-Way Set Associative Cache (2/4)N-Way Set Associative Cache (3/4)N-Way Set Associative Cache (4/4)Associative Cache ExampleSlide 23Peer InstructionsCache Things to RememberCS61C L33 Caches III (1)Garcia © UCBLecturer PSOE Dan Garciawww.cs.berkeley.edu/~ddgarciainst.eecs.berkeley.edu/~cs61c CS61C : Machine StructuresLecture 33 Caches IIIThere will be some really coolexhibits you should take the time to see! Concrete canoes, robot races, free massages, and presentations by Dan’s UCBUGG and GamesCrafters groups.www.berkeley.edu/calday/Attend Cal Day tomorrow CS61C L33 Caches III (2)Garcia © UCBReview…•Mechanism for transparent movement of data among levels of a storage hierarchy•set of address/value bindings•address => index to set of candidates•compare desired address with tag•service hit or miss-load new block and binding on missValidTag0x0-30x4-7 0x8-b 0xc-f0123...10 a b c d000000000000000000 0000000001 1100address: tag index offsetCS61C L33 Caches III (3)Garcia © UCBBig-endian and little-endian derive from Jonathan Swift's Gulliver's Travels in which the Big Endians were a political faction that broke their eggs at the large end ("the primitive way") and rebelled against the Lilliputian King who required his subjects (the Little Endians) to break their eggs at the small end. Big Endian vs. Little EndianBig Endian• ADDR3 ADDR2 ADDR1 ADDR0 BYTE0 BYTE1 BYTE2 BYTE300000001 00000100 00000000 00000000• ADDR0 ADDR1 ADDR2 ADDR3 BYTE3 BYTE2 BYTE1 BYTE000000000 00000000 00000100 00000001Little Endian• ADDR3 ADDR2 ADDR1 ADDR0 BYTE3 BYTE2 BYTE1 BYTE0 00000000 00000000 00000100 00000001• ADDR0 ADDR1 ADDR2 ADDR3 BYTE0 BYTE1 BYTE2 BYTE3 00000001 00000100 00000000 00000000Consider the number 1025 as we normally write it:BYTE3 BYTE2 BYTE1 BYTE000000000 00000000 00000100 00000001www.webopedia.com/TERM/b/big_endian.htmlsearchnetworking.techtarget.com/sDefinition/0,,sid7_gci211659,00.htmlwww.noveltheory.com/TechPapers/endian.aspen.wikipedia.org/wiki/Big_endian• The order in which BYTES are stored in memory• Bits always stored as usual. (E.g., 0xC2=0b 1100 0010)CS61C L33 Caches III (4)Garcia © UCB•Blah blah Cache size 16KB blah blah 223 blocks blah blah how many bits?•Answer! 2XY means…X=0  no suffixX=1  kibi ~ Kilo 103X=2  mebi ~ Mega 106X=3  gibi ~ Giga 109X=4  tebi ~ Tera 1012X=5  pebi ~ Peta 1015X=6  exbi ~ Exa 1018X=7  zebi ~ Zetta 1021X=8  yobi ~ Yotta 1024Memorized this table yet? Y=0  1Y=1  2Y=2  4Y=3  8Y=4  16Y=5  32Y=6  64Y=7  128Y=8  256Y=9  512*CS61C L33 Caches III (5)Garcia © UCBHow Much Information IS that?•Print, film, magnetic, and optical storage media produced about 5 exabytes of new information in 2002. 92% of the new information stored on magnetic media, mostly in hard disks.•Amt of new information stored on paper, film, magnetic, & optical media ~doubled in last 3 yrs•Information flows through electronic channels -- telephone, radio, TV, and the Internet -- contained ~18 exabytes of new information in 2002, 3.5x more than is recorded in storage media. 98% of this total is the information sent & received in telephone calls - incl. voice & data on fixed lines & wireless.•WWW  170 Tb of information on its surface; in volume 17x the size of the Lib. of Congress print collections.•Instant messaging  5x109 msgs/day (750GB), 274 TB/yr.•Email  ~400 PB of new information/year worldwide.www.sims.berkeley.edu/research/projects/how-much-info-2003/CS61C L33 Caches III (6)Garcia © UCBBlock Size Tradeoff (1/3)•Benefits of Larger Block Size•Spatial Locality: if we access a given word, we’re likely to access other nearby words soon•Very applicable with Stored-Program Concept: if we execute a given instruction, it’s likely that we’ll execute the next few as well•Works nicely in sequential array accesses tooCS61C L33 Caches III (7)Garcia © UCBBlock Size Tradeoff (2/3)•Drawbacks of Larger Block Size•Larger block size means larger miss penalty-on a miss, takes longer time to load a new block from next level•If block size is too big relative to cache size, then there are too few blocks-Result: miss rate goes up•In general, minimize Average Memory Access Time (AMAT)= Hit Time + Miss Penalty x Miss RateCS61C L33 Caches III (8)Garcia © UCBBlock Size Tradeoff (3/3)•Hit Time = time to find and retrieve data from current level cache•Miss Penalty = average time to retrieve data on a current level miss (includes the possibility of misses on successive levels of memory hierarchy)•Hit Rate = % of requests that are found in current level cache•Miss Rate = 1 - Hit RateCS61C L33 Caches III (9)Garcia © UCBExtreme Example: One Big Block•Cache Size = 4 bytes Block Size = 4 bytes•Only ONE entry in the cache!•If item accessed, likely accessed again soon•But unlikely will be accessed again immediately!•The next access will likely to be a miss again•Continually loading data into the cache butdiscard data (force out) before use it again•Nightmare for cache designer: Ping Pong Effect Cache DataValid BitB 0B 1B 3TagB 2CS61C L33 Caches III (10)Garcia © UCBBlock Size Tradeoff ConclusionsMissPenaltyBlock SizeIncreased Miss Penalty& Miss RateAverageAccessTimeBlock SizeExploits Spatial LocalityFewer blocks: compromisestemporal localityMissRateBlock SizeCS61C L33 Caches III (12)Garcia © UCBTypes of Cache Misses (1/2)•“Three Cs” Model of Misses•1st C: Compulsory Misses•occur when a program is first started•cache does not contain any of that program’s data yet, so misses are bound to occur•can’t be avoided easily, so won’t focus on these in this courseCS61C L33 Caches III (13)Garcia © UCBTypes of Cache Misses (2/2)•2nd C: Conflict Misses•miss that occurs because two distinct memory addresses map to the same cache location•two blocks (which happen to map to the same location) can keep overwriting each other•big


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Berkeley COMPSCI 61C - Lecture Notes

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