inst eecs berkeley edu cs61c CS61C Machine Structures Lecture 33 Caches III Lecturer PSOE Dan Garcia www cs berkeley edu ddgarcia Attend Cal Day tomorrow There will be some really cool exhibits you should take the time to see Concrete canoes robot races free massages and presentations by Dan s UCBUGG and GamesCrafters groups CS61C L33 Caches III 1 www berkeley edu calday Garcia UCB Review Mechanism for transparent movement of data among levels of a storage hierarchy set of address value bindings address index to set of candidates compare desired address with tag service hit or miss load new block and binding on miss address tag index offset 000000000000000000 0000000001 1100 Valid 0x4 7 0x8 b 0xc f 0x0 3 Tag 0 1 1 2 3 0 a b c d CS61C L33 Caches III 2 Garcia UCB Big Endian vs Little Endian Big endian and little endian derive from Jonathan Swift s Gulliver s Travels in which the Big Endians were a political faction that broke their eggs at the large end the primitive way and rebelled against the Lilliputian King who required his subjects the Little Endians to break their eggs at the small end The order in which BYTES are stored in memory Bits always stored as usual E g 0xC2 0b 1100 0010 Consider the number 1025 as we normally write it BYTE3 BYTE2 BYTE1 BYTE0 00000000 00000000 00000100 00000001 Little Endian Big Endian ADDR3 ADDR2 ADDR1 ADDR0 BYTE0 BYTE1 BYTE2 BYTE3 00000001 00000100 00000000 00000000 ADDR3 ADDR2 ADDR1 ADDR0 BYTE3 BYTE2 BYTE1 BYTE0 00000000 00000000 00000100 00000001 ADDR0 ADDR1 ADDR2 ADDR3 BYTE3 BYTE2 BYTE1 BYTE0 00000000 00000000 00000100 00000001 ADDR0 ADDR1 ADDR2 ADDR3 BYTE0 BYTE1 BYTE2 BYTE3 00000001 00000100 00000000 00000000 www webopedia com TERM b big endian html searchnetworking techtarget com sDefinition 0 sid7 gci211659 00 html www noveltheory com TechPapers endian asp en wikipedia org wiki Big endian CS61C L33 Caches III 3 Garcia UCB Memorized this table yet Blah blah Cache size 16KB blah blah 223 blocks blah blah how many bits Answer 2XY means X 0 X 1 X 2 X 3 X 4 X 5 X 6 X 7 X 8 no suffix kibi Kilo 103 mebi Mega 106 gibi Giga 109 tebi Tera 1012 pebi Peta 1015 exbi Exa 1018 zebi Zetta 1021 yobi Yotta 1024 CS61C L33 Caches III 4 Y 0 Y 1 Y 2 Y 3 Y 4 Y 5 Y 6 Y 7 Y 8 Y 9 1 2 4 8 16 32 64 128 256 512 Garcia UCB How Much Information IS that www sims berkeley edu research projects how much info 2003 Print film magnetic and optical storage media produced about 5 exabytes of new information in 2002 92 of the new information stored on magnetic media mostly in hard disks Amt of new information stored on paper film magnetic optical media doubled in last 3 yrs Information flows through electronic channels telephone radio TV and the Internet contained 18 exabytes of new information in 2002 3 5x more than is recorded in storage media 98 of this total is the information sent received in telephone calls incl voice data on fixed lines wireless WWW 170 Tb of information on its surface in volume 17x the size of the Lib of Congress print collections Garcia UCB CS61C L33 Caches III 5 Block Size Tradeoff 1 3 Benefits of Larger Block Size Spatial Locality if we access a given word we re likely to access other nearby words soon Very applicable with Stored Program Concept if we execute a given instruction it s likely that we ll execute the next few as well Works nicely in sequential array accesses too CS61C L33 Caches III 6 Garcia UCB Block Size Tradeoff 2 3 Drawbacks of Larger Block Size Larger block size means larger miss penalty on a miss takes longer time to load a new block from next level If block size is too big relative to cache size then there are too few blocks Result miss rate goes up In general minimize Average Memory Access Time AMAT Hit Time Miss Penalty x Miss Rate CS61C L33 Caches III 7 Garcia UCB Block Size Tradeoff 3 3 Hit Time time to find and retrieve data from current level cache Miss Penalty average time to retrieve data on a current level miss includes the possibility of misses on successive levels of memory hierarchy Hit Rate of requests that are found in current level cache Miss Rate 1 Hit Rate CS61C L33 Caches III 8 Garcia UCB Extreme Example One Big Block Valid Bit Cache Data Tag B3 B2 B1 B0 Cache Size 4 bytes Block Size 4 bytes Only ONE entry in the cache If item accessed likely accessed again soon But unlikely will be accessed again immediately The next access will likely to be a miss again Continually loading data into the cache but discard data force out before use it again Nightmare for cache designer Ping Pong Effect CS61C L33 Caches III 9 Garcia UCB Block Size Tradeoff Conclusions Miss Rate Exploits Spatial Locality Miss Penalty Block Size Average Access Time Fewer blocks compromises temporal locality Block Size Increased Miss Penalty Miss Rate Block Size CS61C L33 Caches III 10 Garcia UCB Types of Cache Misses 1 2 Three Cs Model of Misses 1st C Compulsory Misses occur when a program is first started cache does not contain any of that program s data yet so misses are bound to occur can t be avoided easily so won t focus on these in this course CS61C L33 Caches III 12 Garcia UCB Types of Cache Misses 2 2 2nd C Conflict Misses miss that occurs because two distinct memory addresses map to the same cache location two blocks which happen to map to the same location can keep overwriting each other big problem in direct mapped caches how do we lessen the effect of these Dealing with Conflict Misses Solution 1 Make the cache size bigger Fails at some point Solution 2 Multiple distinct blocks can fit in the same cache Index CS61C L33 Caches III 13 Garcia UCB Fully Associative Cache 1 3 Memory address fields Tag same as before Offset same as before Index non existant What does this mean no rows any block can go anywhere in the cache must compare with all tags in entire cache to see if data is there CS61C L33 Caches III 14 Garcia UCB Fully Associative Cache 2 3 Fully Associative Cache e g 32 B block compare tags in parallel 31 Cache Tag 27 bits long Valid Cache Data B 31 B1 B 0 Cache Tag 4 0 Byte Offset CS61C L33 Caches III 15 Garcia UCB Fully Associative Cache 3 3 Benefit of Fully Assoc Cache No Conflict Misses since data can go anywhere Drawbacks of Fully Assoc Cache Need hardware comparator for every single entry if we have a 64KB of data in cache with 4B entries we need 16K comparators infeasible CS61C L33 Caches III 16 Garcia UCB Third Type of Cache Miss Capacity Misses miss that occurs because the cache has a limited size miss that would not occur
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